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Message-ID: <4f882fa1-8174-2816-71c4-a2941372aa19@linaro.org>
Date: Thu, 7 Sep 2023 08:03:56 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Varadarajan Narayanan <quic_varada@...cinc.com>,
ilia.lin@...nel.org, agross@...nel.org, andersson@...nel.org,
konrad.dybcio@...aro.org, rafael@...nel.org,
viresh.kumar@...aro.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
mturquette@...libre.com, sboyd@...nel.org,
quic_kathirav@...cinc.com, linux-pm@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v1 10/10] arm64: dts: qcom: ipq9574: populate the opp
table based on the eFuse
On 07/09/2023 07:21, Varadarajan Narayanan wrote:
> IPQ95xx SoCs have different OPPs available for the CPU based on
> SoC variant. This can be determined from an eFuse register
> present in the silicon.
>
> Add support to read the eFuse and populate the OPPs based on it.
>
...
> };
> @@ -223,6 +254,11 @@
> reg = <0x000a4000 0x5a1>;
> #address-cells = <1>;
> #size-cells = <1>;
> +
> + cpu_speed_bin: cpu_speed_bin@15 {
No underscores in node names
Best regards,
Krzysztof
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