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Message-ID: <ed2fe299-d8d1-4dfc-72ea-5e86a69b9f5c@linaro.org>
Date:   Wed, 13 Sep 2023 08:58:25 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Myunguk Kim <mwkim@...nchips.com>
Cc:     alsa-devel@...a-project.org, broonie@...nel.org,
        conor+dt@...nel.org, devicetree@...r.kernel.org, fido_max@...ox.ru,
        joabreu@...opsys.com, krzysztof.kozlowski+dt@...aro.org,
        kuninori.morimoto.gx@...esas.com, lgirdwood@...il.com,
        linux-kernel@...r.kernel.org, perex@...ex.cz, robh+dt@...nel.org,
        tiwai@...e.com, u.kleine-koenig@...gutronix.de,
        xingyu.wu@...rfivetech.com
Subject: Re: [PATCH] ASoC: dwc: Add Single DMA mode support

On 13/09/2023 08:43, Myunguk Kim wrote:
>>> This is not dependent on a specific vendor, 
>>> but is intended to describe 
>>> the properties of the signal(single/burst request) connection 
>>> relationship between i2s and dma.
>>
>> How does this relationship depend on hardware?
> 
> When designing a SoC, it depends on the RTL and Bus connection.
> My company has two types of configuration SoC: single and burst 
> to meet ASIC customer's requirements.

Then it is specific to SoC, thus can be deduced from compatible.

Best regards,
Krzysztof

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