lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <62c89f1c03f34f2796244ba83c08adbb@huawei.com>
Date:   Fri, 15 Sep 2023 17:12:12 +0000
From:   Salil Mehta <salil.mehta@...wei.com>
To:     Jonathan Cameron <jonathan.cameron@...wei.com>
CC:     Russell King <linux@...linux.org.uk>,
        "Rafael J. Wysocki" <rafael@...nel.org>,
        Ard Biesheuvel <ardb@...nel.org>,
        James Morse <james.morse@....com>,
        "linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
        "loongarch@...ts.linux.dev" <loongarch@...ts.linux.dev>,
        "linux-acpi@...r.kernel.org" <linux-acpi@...r.kernel.org>,
        "linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        "kvmarm@...ts.linux.dev" <kvmarm@...ts.linux.dev>,
        "x86@...nel.org" <x86@...nel.org>,
        "Jean-Philippe Brucker" <jean-philippe@...aro.org>,
        "jianyong.wu@....com" <jianyong.wu@....com>,
        "justin.he@....com" <justin.he@....com>
Subject: RE: [RFC PATCH v2 27/35] ACPICA: Add new MADT GICC flags fields [code
 first?]

Hi Jonathan,

> From: Jonathan Cameron <jonathan.cameron@...wei.com>
> Sent: Friday, September 15, 2023 4:33 PM
> To: Salil Mehta <salil.mehta@...wei.com>
> Cc: Russell King <linux@...linux.org.uk>; Rafael J. Wysocki
> <rafael@...nel.org>; Ard Biesheuvel <ardb@...nel.org>; James Morse
> <james.morse@....com>; linux-pm@...r.kernel.org; loongarch@...ts.linux.dev;
> linux-acpi@...r.kernel.org; linux-arch@...r.kernel.org; linux-
> kernel@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> riscv@...ts.infradead.org; kvmarm@...ts.linux.dev; x86@...nel.org; Jean-
> Philippe Brucker <jean-philippe@...aro.org>; jianyong.wu@....com;
> justin.he@....com
> Subject: Re: [RFC PATCH v2 27/35] ACPICA: Add new MADT GICC flags fields
> [code first?]
> 
> On Fri, 15 Sep 2023 16:17:21 +0100
> Salil Mehta <salil.mehta@...wei.com> wrote:
> 
> > Hi Russel,
> > Thanks for highlighting your concerns.
> >
> > > From: Russell King <linux@...linux.org.uk>
> > > Sent: Friday, September 15, 2023 2:43 PM
> > > To: Salil Mehta <salil.mehta@...wei.com>
> > > Cc: Rafael J. Wysocki <rafael@...nel.org>; Ard Biesheuvel
> > > <ardb@...nel.org>; Jonathan Cameron <jonathan.cameron@...wei.com>; James
> > > Morse <james.morse@....com>; linux-pm@...r.kernel.org;
> > > loongarch@...ts.linux.dev; linux-acpi@...r.kernel.org; linux-
> > > arch@...r.kernel.org; linux-kernel@...r.kernel.org; linux-arm-
> > > kernel@...ts.infradead.org; linux-riscv@...ts.infradead.org;
> > > kvmarm@...ts.linux.dev; x86@...nel.org; Jean-Philippe Brucker <jean-
> > > philippe@...aro.org>; jianyong.wu@....com; justin.he@....com
> > > Subject: Re: [RFC PATCH v2 27/35] ACPICA: Add new MADT GICC flags fields
> > > [code first?]
> > >
> > > On Fri, Sep 15, 2023 at 09:34:46AM +0000, Salil Mehta wrote:
> > > > > > Note that the ACPI spec says enabled + online-capable isn't defined.
> > > > > >
> > > > > > "The information conveyed by this bit depends on the value of the
> > > > > > Enabled bit. If the Enabled bit is set, this bit is reserved and
> > > > > > must be zero."
> > > > > >
> > > > > > So, if x86 is doing something with the enabled && online-capable
> > > > > > state (other than ignoring the online-capable) then technically it
> > > > > > is doing something that the spec doesn't define
> > > > >
> > > > > And so it is wrong.
> > > >
> > > > Or maybe, specification has not been updated yet. code-first?
> > >
> > > What is the point in speculating. If you want to speculate about it,
> > > fine, but please don't use speculation as a reason that "oh we need
> > > to sort this out before we can merge the patches".
> >
> > [already replied in other thread but repeating it here]
> >
> > Sorry, I am not aware but I was suggesting this. Can we have this
> > done for ARM first because there is a legitimate use-case. This
> > can be done in parallel while other patches are getting reviewed.
> > It would be great if they get accepted even in the current form.
> >
> >
> > > This is precisely why engineers are bad at producing products. They
> > > like to continually tweak the design, and the design never gets out
> > > the door. You need someone who is a project manager to tell engineers
> > > when to stop. Without a project manager to do that, eventually the
> > > project fades into insignificance because it becomes no longer relevant
> > > or has its funding cut.
> > >
> > > Hotplug VCPU on aarch64 feels exactly like that - it seems to be an
> > > engineer project that is just going to for-ever rumble on and never
> > > actually see the light of day.
> >
> >
> > Sometimes things are not in single persons control. Yes, it is
> > frustrating, I do understand that.
> >
> >
> > > So please - stop speculating and lets get vCPU hotplug *actually*
> > > delivered and usable. Even if it's not 100% perfect.
> >
> > We need to decide what is the criteria of acceptability and it can
> > vary across organizations. It depends upon internal requirements.
> > The issues what I pointed are,
> >
> > 1. Legacy OS will not boot on latest platform with hotplug support.
> >    - Try running older windows on ARM platform with hotplug support.
> >      - older windows will only see boot cpu with online-capable bit.
> >      - Will windows use _OSC to check compatibility?
> >    - We have verified this with older Linux and it only shows 1 CPU.
> > 2. Hot(un)plug of cold-booted CPUs.
> >    - Its use-case is subjective. Maybe you can throw light on this.
> >
> > With current composition of bits both 1 & 2 cannot be supported
> > simultaneously.
> >
> > It is perfectly okay to live with them while clearly indicating
> > what we intend to support or are in process of supporting it.
> > But we do need an open discussion about how to proceed. This is
> > to avoid surprises later on.
> >
> > BTW, I am just trying to make every one aware of the problems.
> 
> Step 1 - just allow growing (and shrinking back to initial
> enabled cpus).  That is fine with current specification and legacy
> OS. We only assume CPUs that are hotplugged can later be removed.
> That covers most use cases.


Yes, we can do that for a moment (at least in qemu) and then
not allow unplugging vCPUs which were cold plugged or allow
it as a debugging feature but splash a warning.


> So what effectively what Russell said. Enable what we can with
> the specifications as they stand before getting distracted by
> modifying them (again).


Yes, agreed. Idea was to clearly highlight them. These can be
discussed as part of separate thread in parallel - absolutely!


Thanks
Salil.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ