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Date:   Wed, 20 Sep 2023 08:58:12 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Tengfei Fan <quic_tengfan@...cinc.com>, andersson@...nel.org,
        agross@...nel.org, konrad.dybcio@...aro.org,
        linus.walleij@...aro.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org
Cc:     linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        quic_tsoni@...cinc.com, quic_shashim@...cinc.com,
        quic_kaushalk@...cinc.com, quic_tdas@...cinc.com,
        quic_tingweiz@...cinc.com, quic_aiquny@...cinc.com,
        quic_ajipan@...cinc.com, kernel@...cinc.com
Subject: Re: [PATCH v3 1/2] dt-bindings: pinctrl: qcom: Add SM4450 pinctrl

On 20/09/2023 08:47, Tengfei Fan wrote:
> Add device tree binding Documentation details for Qualcomm SM4450
> TLMM device.
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@...cinc.com>



> +    properties:
> +      pins:
> +        description:
> +          List of gpio pins affected by the properties specified in this
> +          subnode.
> +        items:
> +          oneOf:
> +            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9]|12[0-5])$"

Your driver and gpio-ranges in example tell you have 136 GPIOs, not 126.
It's v3 but still counting GPIOs is incorrect :/

Best regards,
Krzysztof

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