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Message-ID: <kk3xwrq6d7jpkoti2b4lg4hwqfoyqilvf7cp3tuccfmhdj57rf@hicfde4whvzm>
Date: Tue, 19 Sep 2023 20:49:16 -0700
From: Bjorn Andersson <andersson@...nel.org>
To: Tengfei Fan <quic_tengfan@...cinc.com>
Cc: will@...nel.org, robin.murphy@....com, joro@...tes.org,
robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, agross@...nel.org, konrad.dybcio@...aro.org,
catalin.marinas@....com, geert+renesas@...der.be, arnd@...db.de,
neil.armstrong@...aro.org, nfraprado@...labora.com,
rafal@...ecki.pl, peng.fan@....com,
linux-arm-kernel@...ts.infradead.org, iommu@...ts.linux.dev,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, quic_tsoni@...cinc.com,
quic_shashim@...cinc.com, quic_kaushalk@...cinc.com,
quic_tdas@...cinc.com, quic_tingweiz@...cinc.com,
quic_aiquny@...cinc.com, kernel@...cinc.com,
Ajit Pandey <quic_ajipan@...cinc.com>
Subject: Re: [PATCH v2 5/8] arm64: dts: qcom: sm4450: Add apps_rsc and cmd_db
node
On Fri, Sep 15, 2023 at 10:15:06AM +0800, Tengfei Fan wrote:
> From: Ajit Pandey <quic_ajipan@...cinc.com>
>
> Add apps_rsc node and cmd_db memory region for sm4450.
>
> Signed-off-by: Ajit Pandey <quic_ajipan@...cinc.com>
> Signed-off-by: Tengfei Fan <quic_tengfan@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/sm4450.dtsi | 34 ++++++++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi
> index c4e5b33f5169..0d1d39197d77 100644
> --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi
> @@ -5,6 +5,7 @@
>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/soc/qcom,rpmh-rsc.h>
>
> / {
> interrupt-parent = <&intc>;
> @@ -328,6 +329,18 @@
> };
> };
>
> + reserved_memory: reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + aop_cmd_db_mem: cmd-db@...60000 {
> + compatible = "qcom,cmd-db";
> + reg = <0x0 0x80860000 0x0 0x20000>;
> + no-map;
> + };
> + };
> +
> soc: soc@0 {
> #address-cells = <2>;
> #size-cells = <2>;
> @@ -335,6 +348,27 @@
> dma-ranges = <0 0 0 0 0x10 0>;
> compatible = "simple-bus";
>
> + apps_rsc: rsc@...00000 {
> + compatible = "qcom,rpmh-rsc";
> + reg = <0 0x17a00000 0 0x10000>,
As your later patch shows, and Krzysztof pointed out, the sort order is
wrong here (sort nodes under /soc by address).
> + <0 0x17a10000 0 0x10000>,
> + <0 0x17a20000 0 0x10000>;
> + reg-names = "drv-0", "drv-1", "drv-2";
> + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
> + label = "apps_rsc";
> + qcom,tcs-offset = <0xd00>;
> + qcom,drv-id = <2>;
> + qcom,tcs-config = <ACTIVE_TCS 2>, <SLEEP_TCS 3>,
> + <WAKE_TCS 3>, <CONTROL_TCS 0>;
Please confirm that you indeed want 0 CONTROL_TCSs.
Thanks,
Bjorn
> + power-domains = <&CLUSTER_PD>;
> +
> + apps_bcm_voter: bcm-voter {
> + compatible = "qcom,bcm-voter";
> + };
> + };
> +
> tcsr_mutex: hwlock@...0000 {
> compatible = "qcom,tcsr-mutex";
> reg = <0x0 0x01f40000 0x0 0x40000>;
> --
> 2.17.1
>
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