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Message-ID: <ZQ1dsMjS4RBJxi1X@jtpark-7920>
Date: Fri, 22 Sep 2023 18:26:08 +0900
From: Jeongtae Park <jtp.park@...sung.com>
To: Dave Jiang <dave.jiang@...el.com>
Cc: Dan Williams <dan.j.williams@...el.com>,
Alison Schofield <alison.schofield@...el.com>,
Vishal Verma <vishal.l.verma@...el.com>,
Ben Widawsky <bwidawsk@...nel.org>,
Jonathan Cameron <jonathan.cameron@...wei.com>,
Davidlohr Bueso <dave@...olabs.net>,
Fan Ni <fan.ni@...sung.com>, linux-cxl@...r.kernel.org,
linux-kernel@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Kyungsan Kim <ks0204.kim@...sung.com>,
Wonjae Lee <wj28.lee@...sung.com>,
Hojin Nam <hj96.nam@...sung.com>,
Junhyeok Im <junhyeok.im@...sung.com>,
Jehoon Park <jehoon.park@...sung.com>,
Jeongtae Park <jeongtae.park@...il.com>
Subject: Re: [PATCH 7/7] cxl/trace: Enclose a multiple statements macro in a
do while loop
On Thu, Sep 21, 2023 at 03:58:26PM -0700, Dave Jiang wrote:
>
>
> On 9/20/23 19:51, Jeongtae Park wrote:
> > ERROR: Macros with complex values should be enclosed in parentheses
> >
> > Signed-off-by: Jeongtae Park <jtp.park@...sung.com>
>
> I think that goes against typical traceevent macros layout. I would ignore checkpatch warnings on traceevent stuff.
>
>
Ok, I see, I will drop this change.
> > ---
> > drivers/cxl/core/trace.h | 24 +++++++++++++-----------
> > 1 file changed, 13 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
> > index 7aee7fb008a5..e2338773dcd6 100644
> > --- a/drivers/cxl/core/trace.h
> > +++ b/drivers/cxl/core/trace.h
> > @@ -199,17 +199,19 @@ TRACE_EVENT(cxl_overflow,
> > __field(u8, hdr_maint_op_class)
> >
> > #define CXL_EVT_TP_fast_assign(cxlmd, l, hdr) \
> > - __assign_str(memdev, dev_name(&(cxlmd)->dev)); \
> > - __assign_str(host, dev_name((cxlmd)->dev.parent)); \
> > - __entry->log = (l); \
> > - __entry->serial = (cxlmd)->cxlds->serial; \
> > - memcpy(&__entry->hdr_uuid, &(hdr).id, sizeof(uuid_t)); \
> > - __entry->hdr_length = (hdr).length; \
> > - __entry->hdr_flags = get_unaligned_le24((hdr).flags); \
> > - __entry->hdr_handle = le16_to_cpu((hdr).handle); \
> > - __entry->hdr_related_handle = le16_to_cpu((hdr).related_handle); \
> > - __entry->hdr_timestamp = le64_to_cpu((hdr).timestamp); \
> > - __entry->hdr_maint_op_class = (hdr).maint_op_class
> > + do { \
> > + __assign_str(memdev, dev_name(&(cxlmd)->dev)); \
> > + __assign_str(host, dev_name((cxlmd)->dev.parent)); \
> > + __entry->log = (l); \
> > + __entry->serial = (cxlmd)->cxlds->serial; \
> > + memcpy(&__entry->hdr_uuid, &(hdr).id, sizeof(uuid_t)); \
> > + __entry->hdr_length = (hdr).length; \
> > + __entry->hdr_flags = get_unaligned_le24((hdr).flags); \
> > + __entry->hdr_handle = le16_to_cpu((hdr).handle); \
> > + __entry->hdr_related_handle = le16_to_cpu((hdr).related_handle); \
> > + __entry->hdr_timestamp = le64_to_cpu((hdr).timestamp); \
> > + __entry->hdr_maint_op_class = (hdr).maint_op_class; \
> > + } while (0)
> >
> > #define CXL_EVT_TP_printk(fmt, ...) \
> > TP_printk("memdev=%s host=%s serial=%lld log=%s : time=%llu uuid=%pUb " \
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