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Message-ID: <20230921100039.19897-4-r-gunasekaran@ti.com>
Date: Thu, 21 Sep 2023 15:30:39 +0530
From: Ravi Gunasekaran <r-gunasekaran@...com>
To: <nm@...com>, <vigneshr@...com>
CC: <kristo@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<sinthu.raja@...com>, <r-gunasekaran@...com>
Subject: [PATCH 3/3] arm64: dts: ti: k3-am68-sk: Add DT node for USB
From: Sinthu Raja <sinthu.raja@...com>
AM68 Starter kit has a USB3 hub that connects to the SerDes0 Lane 2.
Update the SerDes configuration to support USB3.
Signed-off-by: Sinthu Raja <sinthu.raja@...com>
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@...com>
---
.../boot/dts/ti/k3-am68-sk-base-board.dts | 27 +++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
index 81c2307c77f9..1e1a82f9d2b8 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
@@ -573,6 +573,15 @@
cdns,phy-type = <PHY_TYPE_PCIE>;
resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
};
+
+ serdes0_usb_link: phy@2 {
+ status = "okay";
+ reg = <2>;
+ cdns,num-lanes = <1>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_USB3>;
+ resets = <&serdes_wiz0 3>;
+ };
};
&pcie1_rc {
@@ -582,3 +591,21 @@
phy-names = "pcie-phy";
num-lanes = <2>;
};
+
+&usb_serdes_mux {
+ idle-states = <0>; /* USB0 to SERDES lane 2 */
+};
+
+&usbss0 {
+ status = "okay";
+ pinctrl-0 = <&main_usbss0_pins_default>;
+ pinctrl-names = "default";
+ ti,vbus-divider;
+};
+
+&usb0 {
+ dr_mode = "host";
+ maximum-speed = "super-speed";
+ phys = <&serdes0_usb_link>;
+ phy-names = "cdns3,usb3-phy";
+};
--
2.17.1
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