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Message-ID: <07e0755c0204808295ef8f93b5a400849fb87899.camel@phytec.de>
Date: Mon, 25 Sep 2023 06:57:34 +0000
From: Yannic Moog <Y.Moog@...tec.de>
To: "shawnguo@...nel.org" <shawnguo@...nel.org>
CC: "upstream@...ts.phytec.de" <upstream@...ts.phytec.de>,
"linux-imx@....com" <linux-imx@....com>,
"leoyang.li@....com" <leoyang.li@....com>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"festevam@...il.com" <festevam@...il.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"conor+dt@...nel.org" <conor+dt@...nel.org>,
"krzysztof.kozlowski+dt@...aro.org"
<krzysztof.kozlowski+dt@...aro.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>
Subject: Re: [PATCH 2/2] arm64: dts: freescale: add phyGATE-Tauri i.MX 8M Mini
Support
Hello Shawn,
On Mon, 2023-09-25 at 09:26 +0800, Shawn Guo wrote:
> On Fri, Sep 01, 2023 at 11:26:17AM +0200, Yannic Moog wrote:
> > phyGATE-Tauri uses a phyCORE-i.MX8MM SoM. Add device tree for the
> > board.
> >
> > Signed-off-by: Yannic Moog <y.moog@...tec.de>
> > ---
> > arch/arm64/boot/dts/freescale/Makefile | 1 +
> > .../boot/dts/freescale/imx8mm-phygate-tauri-l.dts | 488
> > +++++++++++++++++++++
> > 2 files changed, 489 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile
> > b/arch/arm64/boot/dts/freescale/Makefile
> > index a750be13ace8..68e5a878e359 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -66,6 +66,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-mx8menlo.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-phg.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb
> > +dtb-$(CONFIG_ARCH_MXC) += imx8mm-phygate-tauri-l.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
> > dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-
> > l.dts b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
> > new file mode 100644
> > index 000000000000..457b23aa57fd
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
> > @@ -0,0 +1,488 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2023 PHYTEC Messtechnik GmbH
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include <dt-bindings/leds/common.h>
> > +#include "imx8mm-phycore-som.dtsi"
> > +
> > +/ {
> > + model = "PHYTEC phyGATE-Tauri-L-iMX8MM";
> > + compatible = "phytec,imx8mm-phygate-tauri-l",
> > + "phytec,imx8mm-phycore-som", "fsl,imx8mm";
> > +
> > + chosen {
> > + stdout-path = &uart3;
> > + };
> > +
> > + can_osc_40m: can-clock {
>
> Can we name the code clock-can?
>
> > + compatible = "fixed-clock";
> > + clock-frequency = <40000000>;
> > + clock-output-names = "can_osc_40m";
> > + #clock-cells = <0>;
> > + };
> > +
> > + gpio-keys {
> > + compatible = "gpio-keys";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_gpiokeys>;
> > +
> > + key {
> > + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
> > + label = "KEY-A";
> > + linux,code = <30>;
>
> Can we use the constant defined in
> include/dt-bindings/input/linux-event-codes.h?
>
> > + };
> > + };
> > +
> > + leds {
> > + compatible = "gpio-leds";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_leds>;
> > +
> > + led-1 {
> > + color = <LED_COLOR_ID_RED>;
> > + gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
> > + linux,default-trigger = "none";
> > + };
> > +
> > + led-2 {
> > + color = <LED_COLOR_ID_YELLOW>;
> > + gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
> > + linux,default-trigger = "none";
> > + };
> > + };
> > +
> > + usdhc1_pwrseq: pwr-seq {
> > + compatible = "mmc-pwrseq-simple";
> > + post-power-on-delay-ms = <100>;
> > + power-off-delay-us = <60>;
> > + reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + reg_usb_hub_vbus: regulator-hub-otg1 {
> > + compatible = "regulator-fixed";
> > + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usbhubpwr>;
> > + regulator-name = "usb_hub_vbus";
> > + regulator-max-microvolt = <5000000>;
> > + regulator-min-microvolt = <5000000>;
> > + };
> > +
> > + reg_usb_otg1_vbus: regulator-usb-otg1 {
> > + compatible = "regulator-fixed";
> > + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usbotg1pwr>;
> > + regulator-name = "usb_otg1_vbus";
> > + regulator-max-microvolt = <5000000>;
> > + regulator-min-microvolt = <5000000>;
> > + };
> > +
> > + reg_usdhc2_vmmc: regulator-usdhc2 {
> > + compatible = "regulator-fixed";
> > + enable-active-high;
>
> Can we move it after 'gpio' property?
>
> > + gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
> > + off-on-delay-us = <20000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-min-microvolt = <3300000>;
> > + regulator-name = "VSD_3V3";
> > + };
> > +};
> > +
> > +&ecspi1 {
> > + cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>,
> > + <&gpio5 13 GPIO_ACTIVE_LOW>,
> > + <&gpio5 2 GPIO_ACTIVE_LOW>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + status = "okay";
> > +
> > + /* CAN MCP251XFD */
> > + can0: can@0 {
> > + compatible = "microchip,mcp251xfd";
> > + clocks = <&can_osc_40m>;
> > + interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
> > + interrupt-parent = <&gpio1>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_can_int>;
> > + reg = <0>;
>
> We usually put 'reg' right after 'compatible'.
Thanks for pointing these things out, will send an updated version.
Yannic
>
> Shawn
[snip]
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