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Message-ID: <PH0PR11MB561107915309A4108EF0DC9B81C3A@PH0PR11MB5611.namprd11.prod.outlook.com>
Date: Tue, 26 Sep 2023 07:04:22 +0000
From: <Shravan.Chippa@...rochip.com>
To: <conor@...nel.org>
CC: <green.wan@...ive.com>, <vkoul@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <palmer@...belt.com>,
<paul.walmsley@...ive.com>, <conor+dt@...nel.org>,
<palmer@...ive.com>, <dmaengine@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <Nagasuresh.Relli@...rochip.com>,
<Praveen.Kumar@...rochip.com>, <Conor.Dooley@...rochip.com>
Subject: RE: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible name
Hi,
> -----Original Message-----
> From: Conor Dooley <conor@...nel.org>
> Sent: Friday, September 22, 2023 3:34 PM
> To: shravan Chippa - I35088 <Shravan.Chippa@...rochip.com>
> Cc: green.wan@...ive.com; vkoul@...nel.org; robh+dt@...nel.org;
> krzysztof.kozlowski+dt@...aro.org; palmer@...belt.com;
> paul.walmsley@...ive.com; conor+dt@...nel.org; palmer@...ive.com;
> dmaengine@...r.kernel.org; devicetree@...r.kernel.org; linux-
> riscv@...ts.infradead.org; linux-kernel@...r.kernel.org; Nagasuresh Relli -
> I67208 <Nagasuresh.Relli@...rochip.com>; Praveen Kumar - I30718
> <Praveen.Kumar@...rochip.com>; Conor Dooley - M52691
> <Conor.Dooley@...rochip.com>
> Subject: Re: [PATCH v1 3/3] dmaengine: sf-pdma: add mpfs-pdma compatible
> name
>
> Hey Shravan,
>
> On Fri, Sep 22, 2023 at 03:20:39PM +0530, shravan chippa wrote:
> > From: Shravan Chippa <shravan.chippa@...rochip.com>
> >
> > Sifive platform dma does not allow out-of-order transfers,
>
> Can you remind me why we determined that this was the case?
> IOW, why could we not enable the out-of-order transfers and get a
> performance benefit for everyone? It's been a year or so (I think) and I have
> forgotten.
sf-dma is used for all Sifive RISC-V chipsets, but we will not be able to test on all of them
in the microchip polar-fire FPGA SOC (RISC-V) platform we got good throughput with out-off-order transfers.
so we thought of having a separate compatible name for sf-dma driver to use out-of-order transfers.
Thanks,
Shravan
>
> Cheers,
> Conor.
>
> > buf out-of-order dma has a significant performance advantage.
> > Add a PolarFire SoC specific compatible and code to support for
> > out-of-order dma transfers
> >
> > Signed-off-by: Shravan Chippa <shravan.chippa@...rochip.com>
> > Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
> > Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> > ---
> > drivers/dma/sf-pdma/sf-pdma.c | 27 ++++++++++++++++++++++++---
> > drivers/dma/sf-pdma/sf-pdma.h | 6 ++++++
> > 2 files changed, 30 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/dma/sf-pdma/sf-pdma.c
> > b/drivers/dma/sf-pdma/sf-pdma.c index c7558c9f9ac3..992a804166d5
> > 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.c
> > +++ b/drivers/dma/sf-pdma/sf-pdma.c
> > @@ -21,6 +21,7 @@
> > #include <linux/dma-mapping.h>
> > #include <linux/of.h>
> > #include <linux/of_dma.h>
> > +#include <linux/of_device.h>
> > #include <linux/slab.h>
> >
> > #include "sf-pdma.h"
> > @@ -66,7 +67,7 @@ static struct sf_pdma_desc
> > *sf_pdma_alloc_desc(struct sf_pdma_chan *chan) static void
> sf_pdma_fill_desc(struct sf_pdma_desc *desc,
> > u64 dst, u64 src, u64 size)
> > {
> > - desc->xfer_type = PDMA_FULL_SPEED;
> > + desc->xfer_type = desc->chan->pdma->transfer_type;
> > desc->xfer_size = size;
> > desc->dst_addr = dst;
> > desc->src_addr = src;
> > @@ -520,6 +521,7 @@ static struct dma_chan *sf_pdma_of_xlate(struct
> > of_phandle_args *dma_spec,
> >
> > static int sf_pdma_probe(struct platform_device *pdev) {
> > + const struct sf_pdma_driver_platdata *ddata;
> > struct sf_pdma *pdma;
> > int ret, n_chans;
> > const enum dma_slave_buswidth widths = @@ -545,6 +547,14 @@
> static
> > int sf_pdma_probe(struct platform_device *pdev)
> >
> > pdma->n_chans = n_chans;
> >
> > + pdma->transfer_type = PDMA_FULL_SPEED;
> > +
> > + ddata = of_device_get_match_data(&pdev->dev);
> > + if (ddata) {
> > + if (ddata->quirks & NO_STRICT_ORDERING)
> > + pdma->transfer_type &= ~(NO_STRICT_ORDERING);
> > + }
> > +
> > pdma->membase = devm_platform_ioremap_resource(pdev, 0);
> > if (IS_ERR(pdma->membase))
> > return PTR_ERR(pdma->membase);
> > @@ -629,11 +639,22 @@ static int sf_pdma_remove(struct
> platform_device *pdev)
> > return 0;
> > }
> >
> > +static const struct sf_pdma_driver_platdata mpfs_pdma = {
> > + .quirks = NO_STRICT_ORDERING,
> > +};
> > +
> > static const struct of_device_id sf_pdma_dt_ids[] = {
> > - { .compatible = "sifive,fu540-c000-pdma" },
> > - { .compatible = "sifive,pdma0" },
> > + {
> > + .compatible = "sifive,fu540-c000-pdma",
> > + }, {
> > + .compatible = "sifive,pdma0",
> > + }, {
> > + .compatible = "microchip,mpfs-pdma",
> > + .data = &mpfs_pdma,
> > + },
> > {},
> > };
> > +
> > MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
> >
> > static struct platform_driver sf_pdma_driver = { diff --git
> > a/drivers/dma/sf-pdma/sf-pdma.h b/drivers/dma/sf-pdma/sf-pdma.h
> index
> > 5c398a83b491..3b16db4daa0b 100644
> > --- a/drivers/dma/sf-pdma/sf-pdma.h
> > +++ b/drivers/dma/sf-pdma/sf-pdma.h
> > @@ -49,6 +49,7 @@
> >
> > /* Transfer Type */
> > #define PDMA_FULL_SPEED 0xFF000008
> > +#define NO_STRICT_ORDERING BIT(3)
> >
> > /* Error Recovery */
> > #define MAX_RETRY 1
> > @@ -112,8 +113,13 @@ struct sf_pdma {
> > struct dma_device dma_dev;
> > void __iomem *membase;
> > void __iomem *mappedbase;
> > + u32 transfer_type;
> > u32 n_chans;
> > struct sf_pdma_chan chans[];
> > };
> >
> > +struct sf_pdma_driver_platdata {
> > + u32 quirks;
> > +};
> > +
> > #endif /* _SF_PDMA_H */
> > --
> > 2.34.1
> >
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