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Message-ID: <b7c87a3a-32ef-fe58-0cf2-230100f377d5@ti.com>
Date: Wed, 27 Sep 2023 13:53:55 +0530
From: "J, KEERTHY" <j-keerthy@...com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
<robh+dt@...nel.org>, <nm@...com>, <vigneshr@...com>,
<conor+dt@...nel.org>, <kristo@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>
CC: <u-kumar1@...com>, <linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 4/7] arm64: dts: ti: k3-j784s4-main: Add the main
domain watchdog instances
On 9/27/2023 1:24 PM, Krzysztof Kozlowski wrote:
> On 26/09/2023 15:28, Keerthy wrote:
>> There are totally 19 instances of watchdog module. One each for the
>> 8 A72 cores, one each for the 4 C7x cores, 1 for the GPU, 1 each
>> for the 6 R5F cores in the main domain. Keeping only the A72 instances
>> enabled and disabling the rest by default.
>>
>> Signed-off-by: Keerthy <j-keerthy@...com>
>> ---
>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 182 +++++++++++++++++++++
>> 1 file changed, 182 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> index 26dc3776f911..8c3efe066803 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> @@ -1576,4 +1576,186 @@
>> <695>;
>> bootph-pre-ram;
>> };
>> +
>> + watchdog0: watchdog@...0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2200000 0x00 0x100>;
>> + clocks = <&k3_clks 348 1>;
>> + power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 348 0>;
>> + assigned-clock-parents = <&k3_clks 348 4>;
>> + };
>> +
>> + watchdog1: watchdog@...0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2210000 0x00 0x100>;
>> + clocks = <&k3_clks 349 1>;
>> + power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 349 0>;
>> + assigned-clock-parents = <&k3_clks 349 4>;
>> + };
>> +
>> + watchdog2: watchdog@...0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2220000 0x00 0x100>;
>> + clocks = <&k3_clks 350 1>;
>> + power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 350 0>;
>> + assigned-clock-parents = <&k3_clks 350 4>;
>> + };
>> +
>> + watchdog3: watchdog@...0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2230000 0x00 0x100>;
>> + clocks = <&k3_clks 351 1>;
>> + power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 351 0>;
>> + assigned-clock-parents = <&k3_clks 351 4>;
>> + };
>> +
>> + watchdog4: watchdog@...0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2240000 0x00 0x100>;
>> + clocks = <&k3_clks 352 1>;
>> + power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 352 0>;
>> + assigned-clock-parents = <&k3_clks 352 4>;
>> + };
>> +
>> + watchdog5: watchdog@...0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2250000 0x00 0x100>;
>> + clocks = <&k3_clks 353 1>;
>> + power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 353 0>;
>> + assigned-clock-parents = <&k3_clks 353 4>;
>> + };
>> +
>> + watchdog6: watchdog@...0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2260000 0x00 0x100>;
>> + clocks = <&k3_clks 354 1>;
>> + power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 354 0>;
>> + assigned-clock-parents = <&k3_clks 354 4>;
>> + };
>> +
>> + watchdog7: watchdog@...0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2270000 0x00 0x100>;
>> + clocks = <&k3_clks 355 1>;
>> + power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 355 0>;
>> + assigned-clock-parents = <&k3_clks 355 4>;
>> + };
>> +
>> + watchdog16: watchdog@...0000 {
>> + status = "disabled";
>
> This is a friendly reminder during the review process.
>
> It seems my previous comments were not fully addressed. Maybe my
> feedback got lost between the quotes, maybe you just forgot to apply it.
> Please go back to the previous discussion and either implement all
> requested changes or keep discussing them.
Apologies. I have fixed the order in v6.
>
> Thank you.
>
> Best regards,
> Krzysztof
>
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