linux-kernel - Re: [PATCH V3 4/4] dt-bindings: ufs: qcom: Align clk binding property for Qualcomm UFS

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Message-ID: <c71623bd-d70b-7b25-2f13-a5ec3d4f7c93@quicinc.com>
Date:   Wed, 27 Sep 2023 13:59:22 +0530
From:   Nitin Rawat <quic_nitirawa@...cinc.com>
To:     <agross@...nel.org>, <andersson@...nel.org>,
        <konrad.dybcio@...aro.org>, <mani@...nel.org>,
        <alim.akhtar@...sung.com>, <bvanassche@....org>,
        <avri.altman@....com>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
        <cros-qcom-dts-watchers@...omium.org>
CC:     <linux-arm-msm@...r.kernel.org>, <linux-scsi@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>
Subject: Re: [PATCH V3 4/4] dt-bindings: ufs: qcom: Align clk binding property
 for Qualcomm UFS

Hi ,
I have reposted this patch by removing the change id. Please ignore this.

Regards,
Nitin


On 9/27/2023 1:48 PM, Nitin Rawat wrote:
> Align the binding property for clock such that "clocks" property
> comes first followed by "clock-names" property.
> 
> Change-Id: I53282da8eee8ec349d315de7ada56c99bb12b00d
> Signed-off-by: Nitin Rawat <quic_nitirawa@...cinc.com>
> ---
>   .../devicetree/bindings/ufs/qcom,ufs.yaml        | 16 ++++++++--------
>   1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> index 802640efa956..d17bdc4e934f 100644
> --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> @@ -295,14 +295,6 @@ examples:
>                               <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>;
>               interconnect-names = "ufs-ddr", "cpu-ufs";
>   
> -            clock-names = "core_clk",
> -                          "bus_aggr_clk",
> -                          "iface_clk",
> -                          "core_clk_unipro",
> -                          "ref_clk",
> -                          "tx_lane0_sync_clk",
> -                          "rx_lane0_sync_clk",
> -                          "rx_lane1_sync_clk";
>               clocks = <&gcc GCC_UFS_PHY_AXI_CLK>,
>                        <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
>                        <&gcc GCC_UFS_PHY_AHB_CLK>,
> @@ -311,6 +303,14 @@ examples:
>                        <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
>                        <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
>                        <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
> +            clock-names = "core_clk",
> +                          "bus_aggr_clk",
> +                          "iface_clk",
> +                          "core_clk_unipro",
> +                          "ref_clk",
> +                          "tx_lane0_sync_clk",
> +                          "rx_lane0_sync_clk",
> +                          "rx_lane1_sync_clk";
>               freq-table-hz = <75000000 300000000>,
>                               <0 0>,
>                               <0 0>,