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Message-ID: <106d5134-6829-5a25-f1b1-37e5fe20a617@linux.alibaba.com>
Date:   Wed, 27 Sep 2023 17:15:36 +0800
From:   Baolin Wang <baolin.wang@...ux.alibaba.com>
To:     Wenhua Lin <Wenhua.Lin@...soc.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Andy Shevchenko <andy@...nel.org>,
        Bartosz Golaszewski <brgl@...ev.pl>
Cc:     Orson Zhai <orsonzhai@...il.com>,
        Chunyan Zhang <zhang.lyra@...il.com>,
        linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
        wenhua lin <wenhua.lin1994@...il.com>,
        Xiongpeng Wu <xiongpeng.wu@...soc.com>
Subject: Re: [PATCH V2 2/4] gpio: sprd: Clear interrupt after set the
 interrupt type



On 9/21/2023 5:00 PM, Wenhua Lin wrote:
> The initialization state of the EIC module is a high level trigger.
> If it is currently a high level, the interrupt condition is met at
> this time, and the EIC interrupt has a latch capability, which will
> cause an interrupt to occur after booting. To avoid this, When setting
> the EIC interrupt trigger type, clear the interrupt once.

With Andy's comments,
Reviewed-by: Baolin Wang <baolin.wang@...ux.alibaba.com>

> Signed-off-by: Wenhua Lin <Wenhua.Lin@...soc.com>
> ---
>   drivers/gpio/gpio-eic-sprd.c | 10 ++++++++++
>   1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c
> index bfa8a4c7515a..96f1c7fd3988 100644
> --- a/drivers/gpio/gpio-eic-sprd.c
> +++ b/drivers/gpio/gpio-eic-sprd.c
> @@ -375,29 +375,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type)
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
> +			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
>   			irq_set_handler_locked(data, handle_edge_irq);
>   			break;
>   		case IRQ_TYPE_EDGE_FALLING:
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
> +			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
>   			irq_set_handler_locked(data, handle_edge_irq);
>   			break;
>   		case IRQ_TYPE_EDGE_BOTH:
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 1);
> +			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
>   			irq_set_handler_locked(data, handle_edge_irq);
>   			break;
>   		case IRQ_TYPE_LEVEL_HIGH:
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 1);
> +			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
>   			irq_set_handler_locked(data, handle_level_irq);
>   			break;
>   		case IRQ_TYPE_LEVEL_LOW:
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTBOTH, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTMODE, 1);
>   			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTPOL, 0);
> +			sprd_eic_update(chip, offset, SPRD_EIC_ASYNC_INTCLR, 1);
>   			irq_set_handler_locked(data, handle_level_irq);
>   			break;
>   		default:
> @@ -410,29 +415,34 @@ static int sprd_eic_irq_set_type(struct irq_data *data, unsigned int flow_type)
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
> +			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
>   			irq_set_handler_locked(data, handle_edge_irq);
>   			break;
>   		case IRQ_TYPE_EDGE_FALLING:
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
> +			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
>   			irq_set_handler_locked(data, handle_edge_irq);
>   			break;
>   		case IRQ_TYPE_EDGE_BOTH:
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 1);
> +			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
>   			irq_set_handler_locked(data, handle_edge_irq);
>   			break;
>   		case IRQ_TYPE_LEVEL_HIGH:
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 1);
> +			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
>   			irq_set_handler_locked(data, handle_level_irq);
>   			break;
>   		case IRQ_TYPE_LEVEL_LOW:
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTBOTH, 0);
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTMODE, 1);
>   			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTPOL, 0);
> +			sprd_eic_update(chip, offset, SPRD_EIC_SYNC_INTCLR, 1);
>   			irq_set_handler_locked(data, handle_level_irq);
>   			break;
>   		default:

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