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Message-ID: <4b3dd8a3-b9d0-4ad9-a478-e3e642754135@linaro.org>
Date: Wed, 27 Sep 2023 13:33:37 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Sricharan Ramabadhran <quic_srichara@...cinc.com>,
Gokul Sriram Palanisamy <quic_gokulsri@...cinc.com>,
Varadarajan Narayanan <quic_varada@...cinc.com>,
Anusha Rao <quic_anusha@...cinc.com>,
Devi Priya <quic_devipriy@...cinc.com>,
Jassi Brar <jassisinghbrar@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v2 11/11] arm64: dts: qcom: ipq5332: include the GPLL0 as
clock provider for mailbox
On 14.09.2023 09:00, Kathiravan Thirumoorthy wrote:
> While the kernel is booting up, APSS PLL will be running at 800MHz with
> GPLL0 as source. Once the cpufreq driver is available, APSS PLL will be
> configured to the rate based on the opp table and the source also will
> be changed to APSS_PLL_EARLY. So allow the mailbox to consume the GPLL0,
> with this inclusion, CPU Freq correctly reports that CPU is running at
> 800MHz rather than 24MHz.
>
> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@...cinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Konrad
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