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Message-ID: <215ed02d-1dab-480f-84fb-a828b294f716@infradead.org>
Date: Thu, 28 Sep 2023 10:30:14 -0700
From: Randy Dunlap <rdunlap@...radead.org>
To: Sagar Vashnav <sagarvashnav72427@...il.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] add kernel-doc for dc_dmub_caps
Hi--
On 9/28/23 09:34, Sagar Vashnav wrote:
> From: sagar-7227 <sagarvashnav72427@...il.com>
>
> Add kernel documentation for the dc_dmub_caps structure.
>
> Signed-off-by: sagar-7227 <sagarvashnav72427@...il.com>
Use full name, please.
> ---
> dc.h | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
What file is being patched?
The patch should include the file's full path, like:
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
> diff --git a/dc.h b/dc.h
> index 8125839..cd4dab3 100644
> --- a/dc.h
> +++ b/dc.h
> @@ -208,6 +208,16 @@ struct dc_color_caps {
> struct mpc_color_caps mpc;
> };
>
> +/**
> + * struct dc_dmub_caps - DMUB (Display Microcontroller Unit) capabilities
> + * @psr: support for PSR (Power Saving State Residency)
> + * @mclk_sw: support for MCLK_SW (Memory Clock Switch)
> + * @subvp_psr: supprt for SUBVP PSR (Sub-Viewport Power Saving State Residency)
support
> + * @gecc_enable: GECC (Global Error Correcting Code) enablement.
> + *
> + * This structure describes the capabilities of the Display Microcontroller Unit (DMUB).
> + * It specifies whether certain features like PSR and MCLK_SW are supported.
> + */
> struct dc_dmub_caps {
> bool psr;
> bool mclk_sw;
For the patch to be considered, reviewed, and accepted, it should be sent
to the AMD DRM display maintainers & mailing list. See the MAINTAINERS file:
AMD DISPLAY CORE
M: Harry Wentland <harry.wentland@....com>
M: Leo Li <sunpeng.li@....com>
M: Rodrigo Siqueira <Rodrigo.Siqueira@....com>
L: amd-gfx@...ts.freedesktop.org
Thanks.
~Randy
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