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Message-ID: <20230928093810.iwz52glco2ywy2kc@dhruva>
Date:   Thu, 28 Sep 2023 15:08:10 +0530
From:   Dhruva Gole <d-gole@...com>
To:     Muhammed Efe Cetin <efectn@...l.net>
CC:     <linux-rockchip@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
        <heiko@...ech.de>, <sebastian.reichel@...labora.com>,
        <jonas@...boo.se>, <megi@....cz>
Subject: Re: [PATCH v3 2/3] arm64: dts: rockchip: Add sfc node to rk3588s

On Aug 21, 2023 at 18:47:58 +0300, Muhammed Efe Cetin wrote:
> Add sfc node to rk3588s.dtsi from downstream kernel.

For those with lesser context, can you please mention what SFC means? I
did a quick grep on the compatible and that's how I got to know it's a
Serial Flash Controller

Also, not sure what you mean by downstream kernel, where is it located?
Why did you feel the need to mention it while upstreaming this patch?
Please can you provide more context or drop the downstream part
altogether?

> 
> Signed-off-by: Muhammed Efe Cetin <efectn@...l.net>
> ---
>  arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> index 5544f66c6ff4..1a820a5a51eb 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> @@ -1424,6 +1424,17 @@ sata-port@0 {
>  		};
>  	};
>  
> +	sfc: spi@...b0000 {
> +		compatible = "rockchip,sfc";
> +		reg = <0x0 0xfe2b0000 0x0 0x4000>;
> +		interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 0>;
> +		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
> +		clock-names = "clk_sfc", "hclk_sfc";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +		status = "disabled";
> +	};
> +

Otherwise, looks okay.

Reviewed-by: Dhruva Gole <d-gole@...com>

>  	sdmmc: mmc@...c0000 {
>  		compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
>  		reg = <0x0 0xfe2c0000 0x0 0x4000>;
> -- 
> 2.41.0
> 
> 

-- 
Best regards,
Dhruva Gole <d-gole@...com>

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