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Message-ID: <rqgo4rqnhnj4k5tiguoh7piwgc2kon4wze2jot7txx3z5djcag@tp6qitqu24am>
Date:   Mon, 2 Oct 2023 15:00:35 +0200
From:   Maciej Wieczór-Retman 
        <maciej.wieczor-retman@...el.com>
To:     Reinette Chatre <reinette.chatre@...el.com>
CC:     <fenghua.yu@...el.com>, <tglx@...utronix.de>, <mingo@...hat.com>,
        <bp@...en8.de>, <dave.hansen@...ux.intel.com>, <corbet@....net>,
        <x86@...nel.org>, <hpa@...or.com>, <linux-kernel@...r.kernel.org>,
        <linux-doc@...r.kernel.org>, <ilpo.jarvinen@...ux.intel.com>
Subject: Re: [PATCH v3 0/4] x86/resctrl: Non-contiguous bitmasks in Intel CAT

On 2023-09-29 at 13:30:22 -0700, Reinette Chatre wrote:
>Hi Maciej,
>
>On 9/29/2023 2:00 AM, Maciej Wieczor-Retman wrote:
>> Add kernel support for detecting if non-contiguous 1s in Cache
>> Allocation Technology (CAT) are supported by the hardware. Also add a
>> new resctrl FS file to output this information to the userspace.
>> Keep the hardcoded value for Haswell CPUs only since they do not have
>> CPUID enumeration support for Cache allocation.
>
>This series looks good to me. 
>
>I do have one comment that applies to all patches: Could you please
>take a look at the "Ordering of commit tags" section within
>Documentation/process/maintainer-tip.rst and apply it to all patches
>in this series?
>
>With that done you can add:
>Reviewed-by: Reinette Chatre <reinette.chatre@...el.com>
>
>Thank you.
>
>Reinette
>

Sure, I'll fix the ordering, thank you for reviewing!

-- 
Kind regards
Maciej Wieczór-Retman

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