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Message-ID: <4358da86-1347-cb20-b19b-88982d1f8e20@intel.com>
Date:   Fri, 29 Sep 2023 13:30:22 -0700
From:   Reinette Chatre <reinette.chatre@...el.com>
To:     Maciej Wieczor-Retman <maciej.wieczor-retman@...el.com>,
        <fenghua.yu@...el.com>, <tglx@...utronix.de>, <mingo@...hat.com>,
        <bp@...en8.de>, <dave.hansen@...ux.intel.com>, <corbet@....net>
CC:     <x86@...nel.org>, <hpa@...or.com>, <linux-kernel@...r.kernel.org>,
        <linux-doc@...r.kernel.org>, <ilpo.jarvinen@...ux.intel.com>
Subject: Re: [PATCH v3 0/4] x86/resctrl: Non-contiguous bitmasks in Intel CAT

Hi Maciej,

On 9/29/2023 2:00 AM, Maciej Wieczor-Retman wrote:
> Add kernel support for detecting if non-contiguous 1s in Cache
> Allocation Technology (CAT) are supported by the hardware. Also add a
> new resctrl FS file to output this information to the userspace.
> Keep the hardcoded value for Haswell CPUs only since they do not have
> CPUID enumeration support for Cache allocation.

This series looks good to me. 

I do have one comment that applies to all patches: Could you please
take a look at the "Ordering of commit tags" section within
Documentation/process/maintainer-tip.rst and apply it to all patches
in this series?

With that done you can add:
Reviewed-by: Reinette Chatre <reinette.chatre@...el.com>

Thank you.

Reinette



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