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Message-ID: <BL3PR11MB6532AC02EA46C2D861438A29A2CBA@BL3PR11MB6532.namprd11.prod.outlook.com>
Date: Wed, 4 Oct 2023 11:00:17 +0000
From: "Rabara, Niravkumar L" <niravkumar.l.rabara@...el.com>
To: Miquel Raynal <miquel.raynal@...tlin.com>
CC: Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
"linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] dt-bindings: mtd: cadence: convert
cadence-nand-controller.txt to yaml
> -----Original Message-----
> From: Miquel Raynal <miquel.raynal@...tlin.com>
> Sent: Wednesday, October 4, 2023 3:45 PM
> To: Rabara, Niravkumar L <niravkumar.l.rabara@...el.com>
> Cc: Richard Weinberger <richard@....at>; Vignesh Raghavendra
> <vigneshr@...com>; Rob Herring <robh+dt@...nel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@...aro.org>; Conor Dooley <conor+dt@...nel.org>;
> linux-mtd@...ts.infradead.org; devicetree@...r.kernel.org; linux-
> kernel@...r.kernel.org
> Subject: Re: [PATCH] dt-bindings: mtd: cadence: convert cadence-nand-
> controller.txt to yaml
>
> Hello,
>
> niravkumar.l.rabara@...el.com wrote on Wed, 4 Oct 2023 14:12:14 +0800:
>
> > From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> >
> > Convert cadence-nand-controller.txt to yaml format.
>
> Looks good to me, one question below.
>
> > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> > ---
> > .../devicetree/bindings/mtd/cadence,nand.yaml | 73
> > +++++++++++++++++++ .../bindings/mtd/cadence-nand-controller.txt |
> > 53 --------------
> > 2 files changed, 73 insertions(+), 53 deletions(-) create mode
> > 100644 Documentation/devicetree/bindings/mtd/cadence,nand.yaml
> > delete mode 100644
> > Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt
> >
> > diff --git a/Documentation/devicetree/bindings/mtd/cadence,nand.yaml
> > b/Documentation/devicetree/bindings/mtd/cadence,nand.yaml
> > new file mode 100644
> > index 000000000000..781812ac702f
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mtd/cadence,nand.yaml
> > @@ -0,0 +1,73 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/mtd/cadence,nand.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Cadence NAND controller
> > +
> > +maintainers:
> > + - Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> > +
> > +allOf:
> > + - $ref: nand-controller.yaml
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - const: cdns,hp-nfc
> > +
> > + reg:
> > + items:
> > + - description: Address and length of the controller register set
> > + - description: Address and length of the Slave DMA data port
> > +
> > + reg-names:
> > + items:
> > + - const: reg
> > + - const: sdma
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + clocks:
> > + maxItems: 1
> > +
> > + dmas:
> > + maxItems: 1
> > +
> > + cdns,board-delay-ps:
> > + description: |
> > + Estimated Board delay. The value includes the total round trip
> > + delay for the signals and is used for deciding on values associated
> > + with data read capture. The example formula for SDR mode is the
> > + following.
> > + board delay = RE#PAD delay + PCB trace to device + PCB trace from device
> > + + DQ PAD delay
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - reg-names
> > + - interrupts
> > + - clocks
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > + - |
> > + nand-controller@...80000 {
> > + compatible = "cdns,hp-nfc";
> > + reg = <0x10b80000 0x10000>,
> > + <0x10840000 0x10000>;
> > + reg-names = "reg", "sdma";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + interrupts = <0 97 4>;
> > + clocks = <&nf_clk>;
> > + cdns,board-delay-ps = <4830>;
> > +
> > + nand@0 {
> > + reg = <0>;
> > + };
> > + };
> > diff --git
> > a/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt
> > b/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt
> > deleted file mode 100644
> > index d2eada5044b2..000000000000
> > ---
> > a/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt
> > +++ /dev/null
> > @@ -1,53 +0,0 @@
> > -* Cadence NAND controller
> > -
> > -Required properties:
> > - - compatible : "cdns,hp-nfc"
> > - - reg : Contains two entries, each of which is a tuple consisting of a
> > - physical address and length. The first entry is the address and
> > - length of the controller register set. The second entry is the
> > - address and length of the Slave DMA data port.
> > - - reg-names: should contain "reg" and "sdma"
> > - - #address-cells: should be 1. The cell encodes the chip select connection.
> > - - #size-cells : should be 0.
> > - - interrupts : The interrupt number.
> > - - clocks: phandle of the controller core clock (nf_clk).
> > -
> > -Optional properties:
> > - - dmas: shall reference DMA channel associated to the NAND
> > controller
> > - - cdns,board-delay-ps : Estimated Board delay. The value includes the total
> > - round trip delay for the signals and is used for deciding on values
> > - associated with data read capture. The example formula for SDR mode is
> > - the following:
> > - board delay = RE#PAD delay + PCB trace to device + PCB trace from device
> > - + DQ PAD delay
> > -
> > -Child nodes represent the available NAND chips.
>
> This is not fully pictured in the current schema, by referencing nand-
> controller.yaml I believe you allow all kind of direct partitioning (which is legacy,
> and not supposed to be supported here).
> Can you try to define a partition directly within the controller node in the example
> and see whether it still passes the checks?
>
> Thanks,
> Miquèl
Hi Miquel,
I tried below in the controller node in example,
...
clocks = <&nf_clk>;
cdns,board-delay-ps = <4830>;
partition@0 {
label = "boot";
reg = <0 0x00200000>;
};
nand@0 {
reg = <0>;
};
It shows 'partition@0' was unexpected.
DTC_CHK Documentation/devicetree/bindings/mtd/cadence,nand.example.dtb
Documentation/devicetree/bindings/mtd/cadence,nand.example.dts:35.23-38.14: Warning (unique_unit_address_if_enabled): /example-0/nand-controller@...80000/partition@0: duplicate unit-address (also used in node /example-0/nand-controller@...80000/nand@0)
/mnt/newvolume/users/nrabara/kernel.org/3oct23/Documentation/devicetree/bindings/mtd/cadence,nand.example.dtb: nand-controller@...80000: Unevaluated properties are not allowed ('partition@0' was unexpected)
From schema: /mnt/newvolume/users/nrabara/kernel.org/3oct23/Documentation/devicetree/bindings/mtd/cadence,nand.yaml
However using partition in nand node is OK.
nand@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "boot";
reg = <0 0x00200000>;
};
partition@...000 {
label = "env";
reg = <0x00200000 0x00400000>;
};
};
"make dt_binding_check DT_SCHEMA_FILES=mtd/cadence,nand.yaml" is OK without any warnings.
DTEX Documentation/devicetree/bindings/mtd/cadence,nand.example.dts
DTC_CHK Documentation/devicetree/bindings/mtd/cadence,nand.example.dtb
Any additional changes required for this patch?
Thanks,
Nirav
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