linux-kernel - Re: [PATCH 01/11] MIPS: compressed: Use correct instruction for 64 bit code

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Message-ID: <4e0c9028-832f-24cb-3bf0-1ee98d6ecdf8@linaro.org>
Date:   Thu, 5 Oct 2023 08:40:25 +0200
From:   Philippe Mathieu-Daudé <philmd@...aro.org>
To:     Gregory CLEMENT <gregory.clement@...tlin.com>,
        Paul Burton <paulburton@...nel.org>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        linux-mips@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:     Vladimir Kondratiev <vladimir.kondratiev@...el.com>,
        Tawfik Bayouk <tawfik.bayouk@...ileye.com>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Théo Lebrun <theo.lebrun@...tlin.com>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH 01/11] MIPS: compressed: Use correct instruction for 64
 bit code

On 4/10/23 18:10, Gregory CLEMENT wrote:
> The code clearing BSS already use macro or use correct instruction
> depending id the CPU is 32 bits or 64 bits. However, a few
> instructions remained 32 bits only.
> 
> By using the accurate MACRO, it is now possible to deal with memory
> address beyond 32 bits. As a side effect, when using 64bits processor,
> it also divides the loop number needed to clear the BSS by 2.
> 
> Signed-off-by: Gregory CLEMENT <gregory.clement@...tlin.com>
> ---
>   arch/mips/boot/compressed/head.S | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@...aro.org>