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Message-ID: <20231005164051.984254-1-thippeswamy.havalige@amd.com>
Date:   Thu, 5 Oct 2023 22:10:47 +0530
From:   Thippeswamy Havalige <thippeswamy.havalige@....com>
To:     <linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>
CC:     <lpieralisi@...nel.org>, <kw@...ux.com>, <robh@...nel.org>,
        <bhelgaas@...gle.com>, <krzysztof.kozlowski+dt@...aro.org>,
        <conor+dt@...nel.org>, <michal.simek@....com>,
        <bharat.kumar.gogada@....com>,
        Thippeswamy Havalige <thippeswamy.havalige@....com>
Subject: [PATCH v5 RESEND 0/4] ncrease ecam size value to discover 256 buses during

Current driver is supports up to 16 buses. The following code fixes 
to support up to 256 buses.

update "NWL_ECAM_VALUE_DEFAULT " to 16  can access up to 256MB ECAM
region to detect 256 buses.

Update ecam size to 256MB in device tree binding example.

Remove unwanted code.

Thippeswamy Havalige (4):
  PCI: xilinx-nwl: Remove unnecessary code which updates primary,
    secondary and sub-ordinate bus numbers
  dt-bindings: PCI: xilinx-nwl: Modify ECAM size in example
  PCI: xilinx-nwl: Rename ECAM size default macro
  PCI: xilinx-nwl: Increase ECAM size to accommodate 256 buses

 .../devicetree/bindings/pci/xlnx,nwl-pcie.yaml |  2 +-
 drivers/pci/controller/pcie-xilinx-nwl.c       | 18 +++---------------
 2 files changed, 4 insertions(+), 16 deletions(-)

-- 
2.25.1

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