linux-kernel - Re: [PATCH] soc: renesas: select ERRATA_ANDES for R9A07G043 only when alternatives are present

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Date:   Mon, 9 Oct 2023 10:21:36 +0100
From:   Conor Dooley <conor.dooley@...rochip.com>
To:     Geert Uytterhoeven <geert@...ux-m68k.org>
CC:     <linux-renesas-soc@...r.kernel.org>, <conor@...nel.org>,
        Randy Dunlap <rdunlap@...radead.org>,
        Magnus Damm <magnus.damm@...il.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        <linux-kernel@...r.kernel.org>, <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH] soc: renesas: select ERRATA_ANDES for R9A07G043 only
 when alternatives are present

On Mon, Oct 09, 2023 at 10:34:34AM +0200, Geert Uytterhoeven wrote:
> Hi Conor,
> 
> On Mon, Oct 9, 2023 at 10:12 AM Conor Dooley <conor.dooley@...rochip.com> wrote:
> > Randy reported a randconfig build issue against linux-next:
> > WARNING: unmet direct dependencies detected for ERRATA_ANDES
> >   Depends on [n]: RISCV_ALTERNATIVE [=n] && RISCV_SBI [=y]
> >   Selected by [y]:
> >   - ARCH_R9A07G043 [=y] && SOC_RENESAS [=y] && RISCV [=y] && NONPORTABLE [=y] && RISCV_SBI [=y]
> >
> > ../arch/riscv/errata/andes/errata.c:59:54: warning: 'struct alt_entry' declared inside parameter list will not be visible outside of this definition or declaration
> >    59 | void __init_or_module andes_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
> >
> > On RISC-V, alternatives are not usable in XIP kernels, which this
> > randconfig happened to select. Add a check for whether alternatives are
> > available before selecting the ERRATA_ANDES config option.
> >
> > Reported-by: Randy Dunlap <rdunlap@...radead.org>
> > Acked-by: Randy Dunlap <rdunlap@...radead.org>
> > Tested-by: Randy Dunlap <rdunlap@...radead.org>
> > Closes: https://lore.kernel.org/all/09a6b0f0-76a1-45e3-ab52-329c47393d1d@infradead.org/
> > Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> 
> Thanks for your patch!
> 
> > --- a/drivers/soc/renesas/Kconfig
> > +++ b/drivers/soc/renesas/Kconfig
> > @@ -343,7 +343,7 @@ config ARCH_R9A07G043
> >         select ARCH_RZG2L
> >         select AX45MP_L2_CACHE if RISCV_DMA_NONCOHERENT
> >         select DMA_GLOBAL_POOL
> > -       select ERRATA_ANDES if RISCV_SBI
> > +       select ERRATA_ANDES if (RISCV_SBI && RISCV_ALTERNATIVE)
> 
> Perhaps ARCH_R9A07G043 should depend on RISCV_ALTERNATIVE (and
> RISCV_SBI) instead?  It's not like RZ/Five is gonna work without the
> Andes errata handling present (unless all of them are related to cache
> handling, and we can run uncached; also see below)).
> 
> >         select ERRATA_ANDES_CMO if ERRATA_ANDES
> 
> And then this "if" can go as well.
> 
> Any other hard dependencies?
> E.g. can RZ/Five work without RISCV_DMA_NONCOHERENT?

That seems fair to me, it won't work without any of the above, so it's
probably fair game to make them actual dependencies & likely more user
friendly since it'll prevent people creating a kernel that cannot
function.

Cheers,
Conor.

> 
> >         help
> >           This enables support for the Renesas RZ/Five SoC.
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> -- 
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds

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