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Message-ID: <20231010014400.GD819755@dragon>
Date: Tue, 10 Oct 2023 09:44:00 +0800
From: Shawn Guo <shawnguo@...nel.org>
To: "Peng Fan (OSS)" <peng.fan@....nxp.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>,
Andy Shevchenko <andy@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Stefan Agner <stefan@...er.ch>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Marco Felsch <m.felsch@...gutronix.de>,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Peng Fan <peng.fan@....com>
Subject: Re: [PATCH v5 6/7] arm64: dts: imx8ulp: update gpio node
On Sun, Oct 01, 2023 at 04:27:57PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@....com>
>
> The i.MX8ULP GPIO supports two interrupts and one register base,
> the current fsl,imx7ulp-gpio compatible could work for i.MX8ULP in
> gpio-vf610.c driver, it is based on the base address are splited
> into two with offset added in device tree node. Now following
> hardware design, using one register base in device tree node.
>
> This may break users who use compatible fsl,imx7ulp-gpio to enable
> i.MX8ULP GPIO.
>
> Signed-off-by: Peng Fan <peng.fan@....com>
Applied, thanks!
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