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Message-ID: <CAA8EJpp+3_A-9YXF1yOKdFweVKqrpTxvxKoJcUH6qiDHfCQ-dQ@mail.gmail.com>
Date: Wed, 11 Oct 2023 14:43:05 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Mrinmay Sarkar <quic_msarkar@...cinc.com>
Cc: Shazad Hussain <quic_shazhuss@...cinc.com>,
Rob Herring <robh@...nel.org>, agross@...nel.org,
andersson@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, konrad.dybcio@...aro.org, mani@...nel.org,
quic_nitegupt@...cinc.com, quic_ramkri@...cinc.com,
quic_nayiluri@...cinc.com, quic_krichai@...cinc.com,
quic_vbadigan@...cinc.com, quic_parass@...cinc.com,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Vinod Koul <vkoul@...nel.org>, linux-pci@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, mhi@...ts.linux.dev,
linux-phy@...ts.infradead.org
Subject: Re: [PATCH v1 1/5] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC
On Wed, 11 Oct 2023 at 14:14, Mrinmay Sarkar <quic_msarkar@...cinc.com> wrote:
>
>
> On 10/6/2023 4:24 PM, Shazad Hussain wrote:
> >
> >
> > On 9/22/2023 12:08 AM, Rob Herring wrote:
> >> On Wed, Sep 20, 2023 at 07:25:08PM +0530, Mrinmay Sarkar wrote:
> >>> Add devicetree bindings support for SA8775P SoC.
> >>> Define reg and interrupt per platform.
> >>>
> >>> Signed-off-by: Mrinmay Sarkar <quic_msarkar@...cinc.com>
> >>> ---
> >>> .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 130
> >>> +++++++++++++++++----
> >>> 1 file changed, 108 insertions(+), 22 deletions(-)
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> >>> b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> >>> index a223ce0..e860e8f 100644
> >>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> >>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> >>> @@ -13,6 +13,7 @@ properties:
> >>> compatible:
> >>> oneOf:
> >>> - enum:
> >>> + - qcom,sa8775p-pcie-ep
> >>> - qcom,sdx55-pcie-ep
> >>> - qcom,sm8450-pcie-ep
> >>> - items:
> >>> @@ -20,29 +21,19 @@ properties:
> >>> - const: qcom,sdx55-pcie-ep
> >>> reg:
> >>> - items:
> >>> - - description: Qualcomm-specific PARF configuration registers
> >>> - - description: DesignWare PCIe registers
> >>> - - description: External local bus interface registers
> >>> - - description: Address Translation Unit (ATU) registers
> >>> - - description: Memory region used to map remote RC address space
> >>> - - description: BAR memory region
> >>> + minItems: 6
> >>> + maxItems: 7
> >>> reg-names:
> >>> - items:
> >>> - - const: parf
> >>> - - const: dbi
> >>> - - const: elbi
> >>> - - const: atu
> >>> - - const: addr_space
> >>> - - const: mmio
> >>> + minItems: 6
> >>> + maxItems: 7
> >>
> >> Don't move these into if/then schemas. Then we are duplicating the
> >> names, and there is no reason to keep them aligned for new compatibles.
> >>
> >> Rob
> >
> > Hi Rob,
> > As we have one extra reg property (dma) required for sa8775p-pcie-ep,
> > isn't it expected to be moved in if/then as per number of regs
> > required. Anyways we would have duplication of some properties for new
> > compatibles where the member numbers differs for a property.
> >
> > Are you suggesting to add the extra reg property (dma) in the existing
> > reg and reg-names list, and add minItems/maxItems for all compatibles
> > present in this file ?
This is what we have been doing in other cases: if the list is an
extension of the current list, there is no need to duplicate it. One
can use min/maxItems instead.
> >
> > -Shazad
>
> Here we have defined reg and interrupt per platform as clocks is defined.
>
> -Mrinmay
>
--
With best wishes
Dmitry
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