lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZSdHAYsmh/mzISKC@octopus>
Date:   Thu, 12 Oct 2023 10:08:17 +0900
From:   AKASHI Takahiro <takahiro.akashi@...aro.org>
To:     Linus Walleij <linus.walleij@...aro.org>,
        Oleksii_Moisieiev@...m.com
Cc:     Bartosz Golaszewski <brgl@...ev.pl>, sudeep.holla@....com,
        cristian.marussi@....com, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org
Subject: Re: [RFC v2 4/5] gpio: add pinctrl based generic gpio driver

Hi Linus and Oleksii,

On Tue, Oct 10, 2023 at 02:00:40PM +0200, Linus Walleij wrote:
> On Thu, Oct 5, 2023 at 4:59???AM AKASHI Takahiro
> <takahiro.akashi@...aro.org> wrote:
> 
> 
> > Some pin controllers provide not only a method to set up lines but
> > also gpio function. With this commit, a new generic gpio driver will
> > be provided. It is implemented purely by using pinctrl interfaces.
> > One of such pin controllers is Arm's SCMI.
> >
> > Signed-off-by: AKASHI Takahiro <takahiro.akashi@...aro.org>
> > ---
> > RFC v2 (Oct 5, 2023)
> 
> RFC v2 looks very good to me, definitely something that can be merged
> as a starting point once the hardware has been tested.

Thank you for your support.
I think the easiest and best way to test the code is that Oleskii will try
my patch on his platform, r-car, on which I believe that SCMI FW for pin
controller is already available since he tested his pinctrl driver.

@Oleskii, can you please take a time for the test?
(I will assist you in case of any error.)

> > +static int pin_control_gpio_direction_input(struct gpio_chip *chip,
> > +                                           unsigned int offset)
> > +{
> > +       return pinctrl_gpio_direction_input(chip->gpiodev->base + offset);
> > +}
> > +
> > +static int pin_control_gpio_direction_output(struct gpio_chip *chip,
> > +                                            unsigned int offset, int val)
> > +{
> > +       return pinctrl_gpio_direction_output(chip->gpiodev->base + offset);
> > +}
> 
> IIRC Bartosz is working on a patch set getting rid of this kludge having to
> call with base + offset in every driver, replacing it with generic calls that
> you can just assign in the gpio_chip.
> 
> When this gets applied these changes will likely be in place so you will
> get rid of this too.

I will try to keep eyes on Bartosz's patch.

Thanks,
-Takahiro Akashi


> Yours,
> Linus Walleij

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ