[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <e678ef3a-0f84-4ea2-9116-a661b91b2e32@tuxon.dev>
Date: Fri, 13 Oct 2023 08:51:25 +0300
From: claudiu beznea <claudiu.beznea@...on.dev>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: magnus.damm@...il.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
mturquette@...libre.com, sboyd@...nel.org,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH 5/6] arm64: dts: renesas: rzg3s-smarc: Enable SDHI1
On 12.10.2023 17:44, Geert Uytterhoeven wrote:
> Hi Claudiu,
>
> On Tue, Oct 10, 2023 at 3:27 PM Claudiu <claudiu.beznea@...on.dev> wrote:
>> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
>>
>> Add SDHI1 to RZ/G3S Smarc Carrier-II board. This is connected to a uSD
>> interface. Although Vccq doesn't cross the boundary of SoM it has
>> been added to RZ/G3S Smarc Carrier-II dtsi to have all the bits related to
>> SDHI1 in a single place. At the moment SoM is used only with RZ/G3S Smarc
>> Carrier-II board.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
>
> Thanks for your patch!
>
>> --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
>> @@ -11,6 +11,27 @@
>> / {
>> aliases {
>> serial0 = &scif0;
>> + mmc1 = &sdhi1;
>> + };
>> +
>> + /* Reserved regulators 0-9 for SoM. */
>> + vcc_sdhi1: regulator10 {
>
> You can use sensible names for the regulators to avoid conflicts.
> E.g. "regulator-vcc-sdhi1".
OK, I'm aware of that, I'll use it like this in the next version.
Thank you,
Claudiu Beznea
>
> The rest LGTM.
>
> Gr{oetje,eeting}s,
>
> Geert
>
Powered by blists - more mailing lists