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Message-ID: <5e1eacc5-721e-4ac1-a62f-ece6a1c4355c@linaro.org>
Date: Wed, 18 Oct 2023 22:10:16 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Varadarajan Narayanan <quic_varada@...cinc.com>, agross@...nel.org,
andersson@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
mturquette@...libre.com, sboyd@...nel.org, rafael@...nel.org,
viresh.kumar@...aro.org, ilia.lin@...nel.org,
quic_kathirav@...cinc.com, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org, linux-pm@...r.kernel.org
Subject: Re: [PATCH v3 8/8] arm64: dts: qcom: ipq9574: populate the opp table
based on the eFuse
On 10/18/23 11:29, Varadarajan Narayanan wrote:
> IPQ95xx SoCs have different OPPs available for the CPU based on
> SoC variant. This can be determined from an eFuse register
> present in the silicon.
>
> Add support to read the eFuse and populate the OPPs based on it.
>
> Frequency 1.2GHz 1.8GHz 1.5GHz No opp-supported-hw
> Limit
> ------------------------------------------------------------
> 936000000 1 1 1 1 0xf
> 1104000000 1 1 1 1 0xf
> 1200000000 1 1 1 1 0xf
> 1416000000 0 1 1 1 0x7
> 1488000000 0 1 1 1 0x7
> 1800000000 0 1 0 1 0x5
> 2208000000 0 0 0 1 0x1
> -----------------------------------------------------------
>
> Signed-off-by: Kathiravan T <quic_kathirav@...cinc.com>
> Signed-off-by: Varadarajan Narayanan <quic_varada@...cinc.com>
> ---
> v2: cpu_speed_bin -> cpu-speed-bin in node name
> Move comment to commit log
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Konrad
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