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Message-ID: <20231019181827.GB35308@noisy.programming.kicks-ass.net>
Date: Thu, 19 Oct 2023 20:18:27 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: "Liang, Kan" <kan.liang@...ux.intel.com>
Cc: mingo@...hat.com, acme@...nel.org, linux-kernel@...r.kernel.org,
mark.rutland@....com, alexander.shishkin@...ux.intel.com,
jolsa@...nel.org, namhyung@...nel.org, irogers@...gle.com,
adrian.hunter@...el.com, ak@...ux.intel.com, eranian@...gle.com,
alexey.v.bayduraev@...ux.intel.com, tinghao.zhang@...el.com
Subject: Re: [PATCH V4 4/7] perf/x86/intel: Support LBR event logging
On Thu, Oct 19, 2023 at 10:26:01AM -0400, Liang, Kan wrote:
> The original LBR event data is saved at offset 32 of LBR_INFO register.
> In get_lbr_events(), the data was simply copied to the offset 32 of
> cpuc->lbr_events.
Urgh, missed that. Clearly reading is a skill :-)
>
> The intel_pmu_update_lbr_event() reorders the value and saves it
> starting from the offset 0.
>
> I agree it's hard to read since it combines the src and dst into the
> same variable.
>
> I will use the suggested code and also update the get_lbr_events().
Thanks!
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