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Message-ID: <20231020-shudder-tackle-cc98a82f1cd0@spud>
Date: Fri, 20 Oct 2023 16:36:19 +0100
From: Conor Dooley <conor@...nel.org>
To: Sebastian Reichel <sebastian.reichel@...labora.com>
Cc: Heiko Stuebner <heiko@...ech.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
linux-rockchip@...ts.infradead.org, linux-usb@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, kernel@...labora.com
Subject: Re: [PATCH v4 1/3] dt-bindings: usb: add rk3588 compatible to
rockchip,dwc3
On Fri, Oct 20, 2023 at 04:11:40PM +0200, Sebastian Reichel wrote:
> RK3588 has three DWC3 controllers. Two of them are fully functional in
> host, device and OTG mode including USB2 support. They are connected to
> dedicated PHYs, that also support USB-C's DisplayPort alternate mode.
>
> The third controller is connected to one of the combphy's shared
> with PCIe and SATA. It can only be used in host mode and does not
> support USB2. Compared to the other controllers this one needs
> some extra clocks.
>
> While adding the extra clocks required by RK3588, I noticed grf_clk
> is not available on RK3568, so I disallowed it for that platform.
>
> Signed-off-by: Sebastian Reichel <sebastian.reichel@...labora.com>
> ---
> .../bindings/usb/rockchip,dwc3.yaml | 60 +++++++++++++++++--
> 1 file changed, 55 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
> index 291844c8f3e1..264c2178d61d 100644
> --- a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
> +++ b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
> @@ -20,9 +20,6 @@ description:
> Type-C PHY
> Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt
>
> -allOf:
> - - $ref: snps,dwc3.yaml#
> -
> select:
> properties:
> compatible:
> @@ -30,6 +27,7 @@ select:
> enum:
> - rockchip,rk3328-dwc3
> - rockchip,rk3568-dwc3
> + - rockchip,rk3588-dwc3
> required:
> - compatible
>
> @@ -39,6 +37,7 @@ properties:
> - enum:
> - rockchip,rk3328-dwc3
> - rockchip,rk3568-dwc3
> + - rockchip,rk3588-dwc3
> - const: snps,dwc3
>
> reg:
> @@ -58,7 +57,9 @@ properties:
> Master/Core clock, must to be >= 62.5 MHz for SS
> operation and >= 30MHz for HS operation
> - description:
> - Controller grf clock
> + Controller grf clock OR UTMI clock
> + - description:
> + PIPE clock
>
> clock-names:
> minItems: 3
> @@ -66,7 +67,10 @@ properties:
> - const: ref_clk
> - const: suspend_clk
> - const: bus_clk
> - - const: grf_clk
> + - enum:
> + - grf_clk
> + - utmi
> + - const: pipe
>
> power-domains:
> maxItems: 1
> @@ -86,6 +90,52 @@ required:
> - clocks
> - clock-names
>
> +allOf:
> + - $ref: snps,dwc3.yaml#
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: rockchip,rk3328-dwc3
> + then:
> + properties:
> + clocks:
> + minItems: 3
minItems for clocks and clock-names is already 3, is it not?
Otherwise,
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Thanks,
Conor.
> + maxItems: 4
> + clock-names:
> + minItems: 3
> + items:
> + - const: ref_clk
> + - const: suspend_clk
> + - const: bus_clk
> + - const: grf_clk
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: rockchip,rk3568-dwc3
> + then:
> + properties:
> + clocks:
> + maxItems: 3
> + clock-names:
> + maxItems: 3
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: rockchip,rk3588-dwc3
> + then:
> + properties:
> + clock-names:
> + minItems: 3
> + items:
> + - const: ref_clk
> + - const: suspend_clk
> + - const: bus_clk
> + - const: utmi
> + - const: pipe
> +
> examples:
> - |
> #include <dt-bindings/clock/rk3328-cru.h>
> --
> 2.42.0
>
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