lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Wed, 25 Oct 2023 08:18:20 -0700
From:   Lizhi Hou <lizhi.hou@....com>
To:     Vinod Koul <vkoul@...nel.org>
CC:     <dmaengine@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <nishad.saraf@....com>, <sonal.santan@....com>, <max.zhen@....com>
Subject: Re: [PATCH V5 0/1] AMD QDMA driver

Hi Vinod,

Do you have more comments on this patch series? I have repined V7 patch 
set. Hopefully, that works better.

Thanks,

Lizhi

On 9/28/23 04:05, Vinod Koul wrote:
> On 22-09-23, 10:15, Lizhi Hou wrote:
>> Hello,
>>
>> The QDMA subsystem is used in conjunction with the PCI Express IP block
>> to provide high performance data transfer between host memory and the
>> card's DMA subsystem.
>>
>>              +-------+       +-------+       +-----------+
>>     PCIe     |       |       |       |       |           |
>>     Tx/Rx    |       |       |       |  AXI  |           |
>>   <=======>  | PCIE  | <===> | QDMA  | <====>| User Logic|
>>              |       |       |       |       |           |
>>              +-------+       +-------+       +-----------+
> This should be in patch description as well
>
>> Comparing to AMD/Xilinx XDMA subsystem,
>>      https://lore.kernel.org/lkml/Y+XeKt5yPr1nGGaq@matsya/
>> the QDMA subsystem is a queue based, configurable scatter-gather DMA
>> implementation which provides thousands of queues, support for multiple
>> physical/virtual functions with single-root I/O virtualization (SR-IOV),
>> and advanced interrupt support. In this mode the IP provides AXI4-MM and
>> AXI4-Stream user interfaces which may be configured on a per-queue basis.
>>
>> The QDMA has been used for Xilinx Alveo PCIe devices.
>>      https://www.xilinx.com/applications/data-center/v70.html
>>
>> This patch series is to provide the platform driver for AMD QDMA subsystem
>> to support AXI4-MM DMA transfers. More functions, such as AXI4-Stream
>> and SR-IOV, will be supported by future patches.
>>
>> The device driver for any FPGA based PCIe device which leverages QDMA can
>> call the standard dmaengine APIs to discover and use the QDMA subsystem
>> without duplicating the QDMA driver code in its own driver.
>>
>> Changes since v4:
>> - Convert to use platform driver callback .remove_new()
>>
>> Changes since v3:
>> - Minor changes in Kconfig description.
>>
>> Changes since v2:
>> - A minor change from code review comments.
>>
>> Changes since v1:
>> - Minor changes from code review comments.
>> - Fixed kernel robot warning.
>>
>> Nishad Saraf (1):
>>    dmaengine: amd: qdma: Add AMD QDMA driver
>>
>>   MAINTAINERS                            |    9 +
>>   drivers/dma/Kconfig                    |   13 +
>>   drivers/dma/Makefile                   |    1 +
>>   drivers/dma/amd/Makefile               |    8 +
>>   drivers/dma/amd/qdma-comm-regs.c       |   66 ++
>>   drivers/dma/amd/qdma.c                 | 1187 ++++++++++++++++++++++++
>>   drivers/dma/amd/qdma.h                 |  269 ++++++
>>   include/linux/platform_data/amd_qdma.h |   36 +
>>   8 files changed, 1589 insertions(+)
>>   create mode 100644 drivers/dma/amd/Makefile
>>   create mode 100644 drivers/dma/amd/qdma-comm-regs.c
>>   create mode 100644 drivers/dma/amd/qdma.c
>>   create mode 100644 drivers/dma/amd/qdma.h
>>   create mode 100644 include/linux/platform_data/amd_qdma.h
>>
>> -- 
>> 2.34.1

Powered by blists - more mailing lists