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Message-ID: <846d933a-598f-43e7-8478-04f3a0d20d1c@linux.intel.com>
Date:   Tue, 31 Oct 2023 14:10:13 +0200
From:   Jarkko Nikula <jarkko.nikula@...ux.intel.com>
To:     Yann Sionneau <yann@...nneau.net>,
        Jan Bottorff <janb@...amperecomputing.com>,
        Wolfram Sang <wsa@...nel.org>,
        Serge Semin <fancer.lancer@...il.com>,
        Yann Sionneau <ysionneau@...rayinc.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Mika Westerberg <mika.westerberg@...ux.intel.com>,
        Jan Dabros <jsd@...ihalf.com>,
        Andi Shyti <andi.shyti@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org
Cc:     Julian Vetter <jvetter@...rayinc.com>,
        Jonathan Borne <jborne@...ray.eu>
Subject: Re: [PATCH v2] i2c: designware: Fix corrupted memory seen in the ISR

On 10/31/23 10:44, Yann Sionneau wrote:
> 
> Le 31/10/2023 à 01:12, Jan Bottorff a écrit :
>> On 10/26/2023 4:18 AM, Wolfram Sang wrote:
>>> So, someone wants to come up with a patch to move to non-relaxed io
>>> accessors?
>>>
>> Is the current thinking to just make writes to DW_IC_INTR_MASK use the 
>> non-relaxed variant or something more broad?
>>
>> From a safest functioning viewpoint, we talked about making all 
>> accessors default to non-relaxed variants. A couple of pretty good 
>> arguments from knowledgeable people favored this. I know there also 
>> was some concerns about potential performance impact this might have 
>> although the counter argument was this is a pretty low speed device so 
>> some extra cpu cycles on register accesses were not likely to degrade 
>> overall performance.
>>
>> I could make the patch if we have consensus (or maintainers decision) 
>> on which way to go: 1) only writes to DW_IC_INTR_MASK are non-relaxed, 
>> 2) make all read/write accessors use the non-relaxed version.
>>
>> I'm personally in camp #2, safety first, performance fine tuning later 
>> if needed. Latent missing barrier bugs are difficult and time 
>> consuming to find.
> 
> Fine with me, let's go for #2 :)
> 
Also simplicity votes for #2.

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