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Message-Id: <169895643051.22248.10364642768194481579.git-patchwork-notify@kernel.org>
Date: Thu, 02 Nov 2023 20:20:30 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Lad@...codeaurora.org, Prabhakar <prabhakar.csengg@...il.com>
Cc: linux-riscv@...ts.infradead.org, geert+renesas@...der.be,
magnus.damm@...il.com, conor+dt@...nel.org,
paul.walmsley@...ive.com, palmer@...belt.com,
aou@...s.berkeley.edu, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, biju.das.jz@...renesas.com,
prabhakar.mahadev-lad.rj@...renesas.com
Subject: Re: [PATCH 0/5] Enable peripherals on RZ/Five SMARC EVK
Hello:
This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@...osinc.com>:
On Fri, 29 Sep 2023 01:06:59 +0100 you wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Hi All,
>
> This patch series does the following:
> * Adds L2 cache node and marks the SoC as noncoherent
> * Enables IP blocks which were explicitly disabled and for
> which support is present
> * Enables the configs required for RZ/Five SoC
>
> [...]
Here is the summary with links:
- [1/5] riscv: dts: renesas: r9a07g043f: Add L2 cache node
(no matching commit)
- [2/5] riscv: dts: renesas: r9a07g043f: Add dma-noncoherent property
(no matching commit)
- [3/5] riscv: dts: renesas: rzfive-smarc: Enable the blocks which were explicitly disabled
(no matching commit)
- [4/5] riscv: dts: renesas: rzfive-smarc: Drop dma properties from SSI1 node
(no matching commit)
- [5/5] riscv: configs: defconfig: Enable configs required for RZ/Five SoC
https://git.kernel.org/riscv/c/db38228c03d6
You are awesome, thank you!
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