linux-kernel - Re: [PATCH 2/2] PCI: Ignore PCIe ports used for tunneling in pcie_bandwidth

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Message-ID: <20231102120739.GA114661@bhelgaas>
Date:   Thu, 2 Nov 2023 07:07:39 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc:     Mario Limonciello <mario.limonciello@....com>, bhelgaas@...gle.com,
        andreas.noever@...il.com, michael.jamet@...el.com,
        YehezkelShB@...il.com, linux-pci@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org,
        Alexander.Deucher@....com
Subject: Re: [PATCH 2/2] PCI: Ignore PCIe ports used for tunneling in
 pcie_bandwidth_available()

On Thu, Nov 02, 2023 at 12:31:08PM +0200, Mika Westerberg wrote:
> On Wed, Nov 01, 2023 at 08:14:31PM -0500, Mario Limonciello wrote:
> > On 11/1/2023 17:52, Bjorn Helgaas wrote:

> > > Lukas' brief intro in
> > > https://lore.kernel.org/all/20230925141930.GA21033@wunner.de/ really
> > > helped me connect a few dots, because things like
> > > Documentation/admin-guide/thunderbolt.rst assume we already know those
> > > details.
> > 
> > Thanks for sharing that.  If I move the detection mechanism as I suggested
> > above I'll reference some of that as well in the commit message to explain
> > what exactly a tunneled port is.
> 
> I'm not sure it makes sense to explain from the zero all this stuff that
> people can easily look up from the corresponding spec, such as PCIe or
> USB.

I don't know if it needs to be in the commit log.

I mentioned thunderbolt.rst because the text at
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/admin-guide/thunderbolt.rst?id=v6.6#n6
assumes that we know the terms "host router", "host controller",
"router", "tunnel", "connection manager", and I don't think that's a
good assumption in that documentation.

A little bit of introduction based on Lukas' text could improve that.

> There is a good picture in USB4 v2 ch 2.2.3 about paths crossing USB4
> fabric, perhaps reference that one? Or ch 2.2.10.3 that shows how this
> works with PCIe tunneling instead (although they are similar).

Thanks for these!

Bjorn