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Message-ID: <f095ba95-ce76-4821-87b7-083f4162fc63@linaro.org>
Date:   Fri, 10 Nov 2023 15:50:18 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Frank Li <Frank.Li@....com>
Cc:     devicetree@...r.kernel.org, dmaengine@...r.kernel.org,
        imx@...ts.linux.dev, joy.zou@....com,
        krzysztof.kozlowski+dt@...aro.org, linux-kernel@...r.kernel.org,
        peng.fan@....com, robh+dt@...nel.org, shenwei.wang@....com,
        vkoul@...nel.org
Subject: Re: [PATCH 4/4] dmaengine: fsl-edma: integrate TCD64 support for
 i.MX95

On 09/11/2023 22:20, Frank Li wrote:
> In i.MX95's edma version 5, the TCD structure is extended to support 64-bit
> addresses for fields like saddr and daddr. To prevent code duplication,
> employ help macros to handle the fields, as the field names remain the same
> between TCD and TCD64.
> 
> Change local variables related to TCD addresses from 'u32' to 'dma_addr_t'
> to accept 64-bit DMA addresses.
> 
> Change 'vtcd' type to 'void *' to avoid direct use. Use helper macros to
> access the TCD fields correctly.
> 
> Call 'dma_set_mask_and_coherent(64)' when TCD64 is supported.
> 
> Signed-off-by: Frank Li <Frank.Li@....com>
> ---

Three kbuild reports with build failures.

I have impression this was never build-tested and reviewed internally
before posting. We had such talk ~month ago and I insisted on some
internal review prior submitting to mailing list. I did not insist on
internal building of patches, because it felt obvious, so please kindly
thoroughly build, review and test your patches internally, before using
the community for this. I am pretty sure NXP can build the code they send.

Thank you in advance.

Best regards,
Krzysztof

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