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Message-ID: <2678cb48-1d2b-47bc-9272-06d9aa140c58@collabora.com>
Date: Fri, 10 Nov 2023 12:56:18 +0100
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Daniel Golle <daniel@...rotopia.org>,
Wim Van Sebroeck <wim@...ux-watchdog.org>,
Guenter Roeck <linux@...ck-us.net>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
linux-watchdog@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH 1/2] dt-bindings: watchdog: mediatek,mtk-wdt: add MT7988
watchdog and toprgu
Il 10/11/23 01:30, Daniel Golle ha scritto:
> Add binding description for mediatek,mt7988-wdt.
>
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> ---
> .../bindings/watchdog/mediatek,mtk-wdt.yaml | 1 +
> include/dt-bindings/reset/mediatek,mt7988-resets.h | 12 ++++++++++++
> 2 files changed, 13 insertions(+)
> create mode 100644 include/dt-bindings/reset/mediatek,mt7988-resets.h
>
> diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> index cc502838bc398..8d2520241e37f 100644
> --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> @@ -25,6 +25,7 @@ properties:
> - mediatek,mt6735-wdt
> - mediatek,mt6795-wdt
> - mediatek,mt7986-wdt
> + - mediatek,mt7988-wdt
> - mediatek,mt8183-wdt
> - mediatek,mt8186-wdt
> - mediatek,mt8188-wdt
> diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> new file mode 100644
> index 0000000000000..fa7c937505e08
> --- /dev/null
> +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h
> @@ -0,0 +1,12 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +
> +/* TOPRGU resets */
The first reset is zero, the second reset is one.
Where's the zero'th reset? :-)
Regards,
Angelo
> +#define MT7988_TOPRGU_SGMII0_GRST 1
> +#define MT7988_TOPRGU_SGMII1_GRST 2
> +#define MT7988_TOPRGU_XFI0_GRST 12
> +#define MT7988_TOPRGU_XFI1_GRST 13
> +#define MT7988_TOPRGU_XFI_PEXTP0_GRST 14
> +#define MT7988_TOPRGU_XFI_PEXTP1_GRST 15
> +#define MT7988_TOPRGU_XFI_PLL_GRST 16
> +
> +#define MT7988_TOPRGU_SW_RST_NUM 24
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