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Date:   Sat, 11 Nov 2023 18:41:06 +0800
From:   kernel test robot <lkp@...el.com>
To:     Ross Philipson <ross.philipson@...cle.com>,
        linux-kernel@...r.kernel.org, x86@...nel.org,
        linux-integrity@...r.kernel.org, linux-doc@...r.kernel.org,
        linux-crypto@...r.kernel.org, iommu@...ts.linux-foundation.org,
        kexec@...ts.infradead.org, linux-efi@...r.kernel.org
Cc:     llvm@...ts.linux.dev, oe-kbuild-all@...ts.linux.dev,
        ross.philipson@...cle.com, dpsmith@...rtussolutions.com,
        tglx@...utronix.de, mingo@...hat.com, bp@...en8.de, hpa@...or.com,
        ardb@...nel.org, mjg59@...f.ucam.org,
        James.Bottomley@...senpartnership.com, luto@...capital.net,
        nivedita@...m.mit.edu, kanth.ghatraju@...cle.com,
        trenchboot-devel@...glegroups.com
Subject: Re: [PATCH v7 09/13] x86: Secure Launch SMP bringup support

Hi Ross,

kernel test robot noticed the following build warnings:

[auto build test WARNING on tip/x86/core]
[also build test WARNING on herbert-cryptodev-2.6/master herbert-crypto-2.6/master linus/master v6.6 next-20231110]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Ross-Philipson/x86-boot-Place-kernel_info-at-a-fixed-offset/20231111-063453
base:   tip/x86/core
patch link:    https://lore.kernel.org/r/20231110222751.219836-10-ross.philipson%40oracle.com
patch subject: [PATCH v7 09/13] x86: Secure Launch SMP bringup support
config: x86_64-rhel-8.3-rust (https://download.01.org/0day-ci/archive/20231111/202311111806.sbmcWUN1-lkp@intel.com/config)
compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231111/202311111806.sbmcWUN1-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202311111806.sbmcWUN1-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> arch/x86/kernel/smpboot.c:1097:6: warning: variable 'ret' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
           if (slaunch_is_txt_launch())
               ^~~~~~~~~~~~~~~~~~~~~~~
   arch/x86/kernel/smpboot.c:1107:6: note: uninitialized use occurs here
           if (ret)
               ^~~
   arch/x86/kernel/smpboot.c:1097:2: note: remove the 'if' if its condition is always false
           if (slaunch_is_txt_launch())
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
   arch/x86/kernel/smpboot.c:1046:9: note: initialize the variable 'ret' to silence this warning
           int ret;
                  ^
                   = 0
   1 warning generated.


vim +1097 arch/x86/kernel/smpboot.c

  1036	
  1037	/*
  1038	 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
  1039	 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
  1040	 * Returns zero if startup was successfully sent, else error code from
  1041	 * ->wakeup_secondary_cpu.
  1042	 */
  1043	static int do_boot_cpu(u32 apicid, int cpu, struct task_struct *idle)
  1044	{
  1045		unsigned long start_ip = real_mode_header->trampoline_start;
  1046		int ret;
  1047	
  1048	#ifdef CONFIG_X86_64
  1049		/* If 64-bit wakeup method exists, use the 64-bit mode trampoline IP */
  1050		if (apic->wakeup_secondary_cpu_64)
  1051			start_ip = real_mode_header->trampoline_start64;
  1052	#endif
  1053		idle->thread.sp = (unsigned long)task_pt_regs(idle);
  1054		initial_code = (unsigned long)start_secondary;
  1055	
  1056		if (IS_ENABLED(CONFIG_X86_32)) {
  1057			early_gdt_descr.address = (unsigned long)get_cpu_gdt_rw(cpu);
  1058			initial_stack  = idle->thread.sp;
  1059		} else if (!(smpboot_control & STARTUP_PARALLEL_MASK)) {
  1060			smpboot_control = cpu;
  1061		}
  1062	
  1063		/* Enable the espfix hack for this CPU */
  1064		init_espfix_ap(cpu);
  1065	
  1066		/* So we see what's up */
  1067		announce_cpu(cpu, apicid);
  1068	
  1069		/*
  1070		 * This grunge runs the startup process for
  1071		 * the targeted processor.
  1072		 */
  1073		if (x86_platform.legacy.warm_reset) {
  1074	
  1075			pr_debug("Setting warm reset code and vector.\n");
  1076	
  1077			smpboot_setup_warm_reset_vector(start_ip);
  1078			/*
  1079			 * Be paranoid about clearing APIC errors.
  1080			*/
  1081			if (APIC_INTEGRATED(boot_cpu_apic_version)) {
  1082				apic_write(APIC_ESR, 0);
  1083				apic_read(APIC_ESR);
  1084			}
  1085		}
  1086	
  1087		smp_mb();
  1088	
  1089		/*
  1090		 * Wake up a CPU in difference cases:
  1091		 * - Intel TXT DRTM launch uses its own method to wake the APs
  1092		 * - Use a method from the APIC driver if one defined, with wakeup
  1093		 *   straight to 64-bit mode preferred over wakeup to RM.
  1094		 * Otherwise,
  1095		 * - Use an INIT boot APIC message
  1096		 */
> 1097		if (slaunch_is_txt_launch())
  1098			slaunch_wakeup_cpu_from_txt(cpu, apicid);
  1099		else if (apic->wakeup_secondary_cpu_64)
  1100			ret = apic->wakeup_secondary_cpu_64(apicid, start_ip);
  1101		else if (apic->wakeup_secondary_cpu)
  1102			ret = apic->wakeup_secondary_cpu(apicid, start_ip);
  1103		else
  1104			ret = wakeup_secondary_cpu_via_init(apicid, start_ip);
  1105	
  1106		/* If the wakeup mechanism failed, cleanup the warm reset vector */
  1107		if (ret)
  1108			arch_cpuhp_cleanup_kick_cpu(cpu);
  1109		return ret;
  1110	}
  1111	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

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