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Message-Id: <20231112061514.2306187-18-guoren@kernel.org>
Date: Sun, 12 Nov 2023 01:14:53 -0500
From: guoren@...nel.org
To: arnd@...db.de, guoren@...nel.org, palmer@...osinc.com,
tglx@...utronix.de, conor.dooley@...rochip.com, heiko@...ech.de,
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Cc: linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, Guo Ren <guoren@...ux.alibaba.com>
Subject: [RFC PATCH V2 17/38] riscv: s64ilp32: Adjust TASK_SIZE for s64ilp32 kernel
From: Guo Ren <guoren@...ux.alibaba.com>
The RV64ILP32 32-bit Linux kernel uses the same userspace address range
as the 64-bit Linux compat mode, about 2GB. They have no difference from
the hardware view, and all are running ILP32 on a 64-bit ISA. But the
standard 32ilp32 Linux has a slightly bigger userspace address space,
about 2.4GB.
Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
Signed-off-by: Guo Ren <guoren@...nel.org>
---
arch/riscv/include/asm/pgtable.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 75970ee2bda2..e5e7a929949a 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -839,20 +839,25 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte)
* "load and store effective addresses, which are 64bits, must have bits
* 63–48 all equal to bit 47, or else a page-fault exception will occur."
*/
+#define TASK_SIZE_32 (_AC(0x80000000, UL) - PAGE_SIZE)
+
#ifdef CONFIG_64BIT
#define TASK_SIZE_64 (PGDIR_SIZE * PTRS_PER_PGD / 2)
#define TASK_SIZE_MIN (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2)
#ifdef CONFIG_COMPAT
-#define TASK_SIZE_32 (_AC(0x80000000, UL) - PAGE_SIZE)
#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
TASK_SIZE_32 : TASK_SIZE_64)
#else
#define TASK_SIZE TASK_SIZE_64
#endif
+#else
+#ifdef CONFIG_ARCH_RV64ILP32
+#define TASK_SIZE TASK_SIZE_32
#else
#define TASK_SIZE FIXADDR_START
+#endif
#define TASK_SIZE_MIN TASK_SIZE
#endif
--
2.36.1
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