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Message-Id: <20231112061514.2306187-24-guoren@kernel.org>
Date:   Sun, 12 Nov 2023 01:14:59 -0500
From:   guoren@...nel.org
To:     arnd@...db.de, guoren@...nel.org, palmer@...osinc.com,
        tglx@...utronix.de, conor.dooley@...rochip.com, heiko@...ech.de,
        apatel@...tanamicro.com, atishp@...shpatra.org, bjorn@...nel.org,
        paul.walmsley@...ive.com, anup@...infault.org, jiawei@...as.ac.cn,
        liweiwei@...as.ac.cn, wefu@...hat.com, U2FsdGVkX1@...il.com,
        wangjunqiang@...as.ac.cn, kito.cheng@...ive.com,
        andy.chiu@...ive.com, vincent.chen@...ive.com,
        greentime.hu@...ive.com, wuwei2016@...as.ac.cn, jrtc27@...c27.com,
        luto@...nel.org, fweimer@...hat.com, catalin.marinas@....com,
        hjl.tools@...il.com
Cc:     linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org, Guo Ren <guoren@...ux.alibaba.com>
Subject: [RFC PATCH V2 23/38] riscv: s64ilp32: Enable native atomic64

From: Guo Ren <guoren@...ux.alibaba.com>

The traditional rv32 Linux (s32ilp32) uses a generic version of the
lib/atomic64.c, which are inaccurate atomic64 primitives and couldn't
co-work with READ_ONCE/WRITE_ONCE,  atomic_8/16/32. The s64ilp32 could
use native AMO instructions to implement accurate atomic64 primitives.

Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
Signed-off-by: Guo Ren <guoren@...nel.org>
---
 arch/riscv/Kconfig              | 2 +-
 arch/riscv/include/asm/atomic.h | 6 ++++++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index f364d2436b1d..0fc03aa076e6 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -65,7 +65,7 @@ config RISCV
 	select CPU_PM if CPU_IDLE || HIBERNATION
 	select EDAC_SUPPORT
 	select GENERIC_ARCH_TOPOLOGY
-	select GENERIC_ATOMIC64 if !64BIT
+	select GENERIC_ATOMIC64 if ARCH_RV32I
 	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
 	select GENERIC_EARLY_IOREMAP
 	select GENERIC_ENTRY
diff --git a/arch/riscv/include/asm/atomic.h b/arch/riscv/include/asm/atomic.h
index f5dfef6c2153..8f6579b33ecc 100644
--- a/arch/riscv/include/asm/atomic.h
+++ b/arch/riscv/include/asm/atomic.h
@@ -16,6 +16,12 @@
 # endif
 #endif
 
+#ifdef CONFIG_ARCH_RV64ILP32
+typedef struct {
+	s64 counter;
+} atomic64_t;
+#endif
+
 #include <asm/cmpxchg.h>
 #include <asm/barrier.h>
 
-- 
2.36.1

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