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Message-ID: <b06b2b9e-8185-41e8-89b5-e6bc8d09d948@hatter.bewilderbeest.net>
Date: Tue, 14 Nov 2023 14:21:49 -0800
From: Zev Weiss <zev@...ilderbeest.net>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Joel Stanley <joel@....id.au>,
Andrew Jeffery <andrew@...econstruct.com.au>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-aspeed@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
openbmc@...ts.ozlabs.org
Subject: Re: [PATCH 2/2] ARM: dts: aspeed: Add ASRock E3C256D4I BMC
On Tue, Nov 14, 2023 at 12:35:37PM PST, Krzysztof Kozlowski wrote:
>On 14/11/2023 12:27, Zev Weiss wrote:
>> Like the E3C246D4I, this is a reasonably affordable off-the-shelf
>> mini-ITX AST2500/Xeon motherboard with good potential as an OpenBMC
>> development platform. Booting the host requires a modicum of eSPI
>> support that's not yet in the mainline kernel, but most other basic
>> BMC functionality is available with this device-tree.
>>
>> Signed-off-by: Zev Weiss <zev@...ilderbeest.net>
>> ---
>> arch/arm/boot/dts/aspeed/Makefile | 1 +
>> .../aspeed/aspeed-bmc-asrock-e3c256d4i.dts | 314 ++++++++++++++++++
>> 2 files changed, 315 insertions(+)
>> create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c256d4i.dts
>>
>> diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile
>> index d3ac20e316d0..3398ee53f034 100644
>> --- a/arch/arm/boot/dts/aspeed/Makefile
>> +++ b/arch/arm/boot/dts/aspeed/Makefile
>> @@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
>> aspeed-bmc-ampere-mtmitchell.dtb \
>> aspeed-bmc-arm-stardragon4800-rep2.dtb \
>> aspeed-bmc-asrock-e3c246d4i.dtb \
>> + aspeed-bmc-asrock-e3c256d4i.dtb \
>> aspeed-bmc-asrock-romed8hm3.dtb \
>> aspeed-bmc-bytedance-g220a.dtb \
>> aspeed-bmc-delta-ahe50dc.dtb \
>> diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c256d4i.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c256d4i.dts
>> new file mode 100644
>> index 000000000000..4c55272afd4f
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-e3c256d4i.dts
>> @@ -0,0 +1,314 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/dts-v1/;
>> +
>> +#include "aspeed-g5.dtsi"
>> +#include <dt-bindings/gpio/aspeed-gpio.h>
>> +#include <dt-bindings/i2c/i2c.h>
>> +#include <dt-bindings/interrupt-controller/irq.h>
>> +#include <dt-bindings/watchdog/aspeed-wdt.h>
>> +
>> +/{
>> + model = "ASRock E3C256D4I BMC";
>> + compatible = "asrock,e3c256d4i-bmc", "aspeed,ast2500";
>> +
>> + aliases {
>> + serial4 = &uart5;
>> +
>> + i2c20 = &i2c2mux0ch0;
>> + i2c21 = &i2c2mux0ch1;
>> + i2c22 = &i2c2mux0ch2;
>> + i2c23 = &i2c2mux0ch3;
>> + };
>> +
>> + chosen {
>> + stdout-path = &uart5;
>> + bootargs = "console=tty0 console=ttyS4,115200 earlycon";
>
>Drop bootargs.
>
Ack.
>> + };
>> +
>> + memory@...00000 {
>> + reg = <0x80000000 0x20000000>;
>> + };
>> +
>> + leds {
>> + compatible = "gpio-leds";
>> +
>> + heartbeat {
>
>It does not look like you tested the DTS against bindings. Please run
>`make dtbs_check W=1` (see
>Documentation/devicetree/bindings/writing-schema.rst or
>https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
>for instructions).
>
Au contraire -- I did, and it exited 0 with no output, which I
interpreted as a clean pass. Are there particular shortcomings beside
what you've already pointed out that you would have expected it to flag?
>> + gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>;
>> + linux,default-trigger = "timer";
>
>Missing function and color.
>
Ack.
Thanks,
Zev
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