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Message-ID: <9acace07-d758-4d5d-8321-de75ee53355d@quicinc.com>
Date:   Tue, 21 Nov 2023 18:28:54 +0800
From:   Jie Luo <quic_luoj@...cinc.com>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>, <agross@...nel.org>,
        <andersson@...nel.org>, <davem@...emloft.net>,
        <edumazet@...gle.com>, <kuba@...nel.org>, <pabeni@...hat.com>,
        <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <conor+dt@...nel.org>, <andrew@...n.ch>, <hkallweit1@...il.com>,
        <linux@...linux.org.uk>, <robert.marko@...tura.hr>
CC:     <linux-arm-msm@...r.kernel.org>, <netdev@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <quic_srichara@...cinc.com>
Subject: Re: [PATCH 2/9] net: mdio: ipq4019: Enable the clocks for ipq5332
 platform



On 11/20/2023 10:22 PM, Konrad Dybcio wrote:
> On 15.11.2023 04:25, Luo Jie wrote:
>> For the platform ipq5332, the related GCC clocks need to be enabled
>> to make the GPIO reset of the MDIO slave devices taking effect.
>>
>> Signed-off-by: Luo Jie <quic_luoj@...cinc.com>
> [...]
> 
>>   static int ipq4019_mdio_wait_busy(struct mii_bus *bus)
>> @@ -212,6 +231,38 @@ static int ipq_mdio_reset(struct mii_bus *bus)
>>   	u32 val;
>>   	int ret;
>>   
>> +	/* For the platform ipq5332, there are two uniphy available to connect the
>> +	 * ethernet devices, the uniphy gcc clock should be enabled for resetting
>> +	 * the connected device such as qca8386 switch or qca8081 PHY effectively.
>> +	 */
>> +	if (of_device_is_compatible(bus->parent->of_node, "qcom,ipq5332-mdio")) {
> Would that not also be taken care of in the phy driver?
> 
> Konrad

Hi Konrad,
These clocks are the SOC clocks that is not related to the PHY type.
no matter what kind of PHY is connected, we also need to configure
these clocks.

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