linux-kernel - Re: [PATCH] powerpc: Add PVN support for HeXin C2000 processor

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Message-ID: <52743BC52E07B486+dcb66331-0993-462b-ac03-6de69a3e1fac@shingroup.cn>
Date:   Wed, 22 Nov 2023 15:25:23 +0800
From:   Zhao Ke 赵 可 <ke.zhao@...ngroup.cn>
To:     Michael Ellerman <mpe@...erman.id.au>, npiggin@...il.com,
        christophe.leroy@...roup.eu, fbarrat@...ux.ibm.com,
        ajd@...ux.ibm.com, arnd@...db.de, gregkh@...uxfoundation.org
Cc:     linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
        kvm@...r.kernel.org, shenghui.qu@...ngroup.cn,
        luming.yu@...ngroup.cn, dawei.li@...ngroup.cn
Subject: Re: [PATCH] powerpc: Add PVN support for HeXin C2000 processor

Hi Michael,

On 2023/11/22 9:46, Michael Ellerman wrote:
> Zhao Ke <ke.zhao@...ngroup.cn> writes:
>> HeXin Tech Co. has applied for a new PVN from the OpenPower Community
>> for its new processor C2000. The OpenPower has assigned a new PVN
>> and this newly assigned PVN is 0x0066, add pvr register related
>> support for this PVN.
>>
>> Signed-off-by: Zhao Ke <ke.zhao@...ngroup.cn>
>> Link: https://discuss.openpower.foundation/t/how-to-get-a-new-pvr-for-processors-follow-power-isa/477/10
>   
> Hi Zhao Ke,
>
> Thanks for the patch. Just a few questions.
>
> Are you able to provide any further detail on the processor?
>
> Your cputable entry claims that it's identical to the original Power8
> core, can you comment at all on how true that is in practice?

Basically, we made lots of design change for the new processor.

For example:

     1. redesign the interconnect of the fabric, from crossbar to mesh

     2. redesign the memory subsystem, including the modification of L2 
and L3 architecture

     3. redesign the SMP bus

     4. upgrade PCIe to gen5 and increase the number of lanes

     5. upgrade ddr to DDR5, dimm direct connected, and the number of 
channels

     6. redesign the pervasive architecture, including debug/trace, 
clock&power management, etc.


> Unfortunately the kernel has some hard-coded knowledge of various
> non-architected features, which are not controlled via the CPU table,
> and are instead controlled by firmware. So you'll need to make sure you
> set those correctly, see init_fw_feat_flags() for details.

Thanks for telling me, we have a firmware team and we will work together

on this.

> One other comment below ...
>
>> diff --git a/arch/powerpc/kernel/cpu_specs_book3s_64.h b/arch/powerpc/kernel/cpu_specs_book3s_64.h
>> index c370c1b804a9..4f604934da7c 100644
>> --- a/arch/powerpc/kernel/cpu_specs_book3s_64.h
>> +++ b/arch/powerpc/kernel/cpu_specs_book3s_64.h
>> @@ -238,6 +238,21 @@ static struct cpu_spec cpu_specs[] __initdata = {
>>   		.machine_check_early	= __machine_check_early_realmode_p8,
>>   		.platform		= "power8",
>>   	},
>> +	{	/* 2.07-compliant processor, HeXin C2000 processor */
>> +		.pvr_mask		= 0xffffffff,
>> +		.pvr_value		= 0x00660000,
>> +		.cpu_name		= "POWER8 (architected)",
>   
> Using "(architected)" here is not right. That's reserved for the
> 0x0f00000x range of PVRs.
>
> You should use "POWER8 (raw)", or you could actually use the marketing
> name there if you want to, eg. "HeXin C2000" or whatever.
I will update this asap.
> cheers
>