linux-kernel - Re: [PATCH v1 2/2] dt-bindings: mmc: mtk-sd: add 64-steps tuning related property

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Message-ID: <8dd46bcd-c1fa-4876-b4d9-e4bb91ce5de9@linaro.org>
Date:   Fri, 24 Nov 2023 09:24:16 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Axe Yang <axe.yang@...iatek.com>,
        Chaotian Jing <chaotian.jing@...iatek.com>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        Wenbin Mei <wenbin.mei@...iatek.com>
Cc:     linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v1 2/2] dt-bindings: mmc: mtk-sd: add 64-steps tuning
 related property

On 24/11/2023 08:08, Axe Yang wrote:
> Add 'mediatek,tune-64-steps' option. This property will give MSDC
> a chance to achieve a more optimal calibration result, thus avoiding
> potential CRC issues.

Documentation goes before users.

> 
> Signed-off-by: Axe Yang <axe.yang@...iatek.com>
> ---
>  Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> index 3fffa467e4e1..c33301e2ea33 100644
> --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> @@ -145,6 +145,14 @@ properties:
>      minimum: 0
>      maximum: 7
>  
> +  mediatek,tune-64-steps:
> +    $ref: /schemas/types.yaml#/definitions/flag
> +    description:
> +      Some Soc need enable 64-steps tuning for better delay value to avoid CRC issue.

This scales poorly. Instead should be enum with number of tuning steps.

> +      If present, tune 64 steps to cover a complete clock cycle.
> +      If not present, tune only 32 steps. For eMMC and SD, this can also yield
> +      satisfactory calibration results in most cases.

Best regards,
Krzysztof