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Message-ID: <736a6dc342ff0c5452687b7588cc194e22bb209c.camel@mediatek.com>
Date: Tue, 28 Nov 2023 07:07:16 +0000
From: Axe Yang (杨磊) <Axe.Yang@...iatek.com>
To: "robh+dt@...nel.org" <robh+dt@...nel.org>,
Wenbin Mei (梅文彬)
<Wenbin.Mei@...iatek.com>,
"krzysztof.kozlowski@...aro.org" <krzysztof.kozlowski@...aro.org>,
"conor+dt@...nel.org" <conor+dt@...nel.org>,
Chaotian Jing (井朝天)
<Chaotian.Jing@...iatek.com>,
"krzysztof.kozlowski+dt@...aro.org"
<krzysztof.kozlowski+dt@...aro.org>,
"matthias.bgg@...il.com" <matthias.bgg@...il.com>,
"ulf.hansson@...aro.org" <ulf.hansson@...aro.org>,
"angelogioacchino.delregno@...labora.com"
<angelogioacchino.delregno@...labora.com>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
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Project_Global_Chrome_Upstream_Group
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Subject: Re: [PATCH v1 2/2] dt-bindings: mmc: mtk-sd: add 64-steps tuning
related property
Hi Krzysztof,
Thank you for the comments. I uploaded patchset v2 just now, please
have a look.
Regards,
Axe
On Fri, 2023-11-24 at 09:24 +0100, Krzysztof Kozlowski wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> On 24/11/2023 08:08, Axe Yang wrote:
> > Add 'mediatek,tune-64-steps' option. This property will give MSDC
> > a chance to achieve a more optimal calibration result, thus
> avoiding
> > potential CRC issues.
>
> Documentation goes before users.
Fixed in v2.
> >
> > Signed-off-by: Axe Yang <axe.yang@...iatek.com>
> > ---
> > Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> > index 3fffa467e4e1..c33301e2ea33 100644
> > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> > @@ -145,6 +145,14 @@ properties:
> > minimum: 0
> > maximum: 7
> >
> > + mediatek,tune-64-steps:
> > + $ref: /schemas/types.yaml#/definitions/flag
> > + description:
> > + Some Soc need enable 64-steps tuning for better delay value
> to avoid CRC issue.
>
> This scales poorly. Instead should be enum with number of tuning
> steps.
Fixed in v2.
>
> > + If present, tune 64 steps to cover a complete clock cycle.
> > + If not present, tune only 32 steps. For eMMC and SD, this
> can also yield
> > + satisfactory calibration results in most cases.
>
> Best regards,
> Krzysztof
>
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