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Message-ID: <a0be9aaa-290d-450e-b0b8-d87453bcaaa0@gmail.com>
Date: Tue, 28 Nov 2023 16:37:09 +0800
From: Jacky Huang <ychuang570808@...il.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
linus.walleij@...aro.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
p.zabel@...gutronix.de, j.neuschaefer@....net
Cc: linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
ychuang3@...oton.com, schung@...oton.com
Subject: Re: [PATCH v2 3/4] arm64: dts: nuvoton: Add pinctrl support for
ma35d1
Dear Krzysztof,
Thanks for your review.
On 2023/11/28 下午 03:35, Krzysztof Kozlowski wrote:
> On 28/11/2023 07:11, Jacky Huang wrote:
>> From: Jacky Huang <ychuang3@...oton.com>
>>
>> Add 'pinctrl' node and 'gpioa' ~ 'gpion' nodes to the dtsi of ma35d1
>> SoC and describe default pin configurations.
>>
>> Enable all UART nodes presented on som and iot boards, and add pinctrl
>> function settings to these nodes.
>>
>> Signed-off-by: Jacky Huang <ychuang3@...oton.com>
>
>> +
>> + gpion: gpio@...40340 {
>> + reg = <0x340 0x40>;
>> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clk GPN_GATE>;
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + };
>> +
>> + pcfg_default: pin-default {
>> + slew-rate = <0>;
>> + input-schmitt-disable;
>> + bias-disable;
>> + power-source = <1>;
>> + drive-strength = <17100>;
>> + };
> It does not look like you tested the DTS against bindings. Please run
> `make dtbs_check W=1` (see
> Documentation/devicetree/bindings/writing-schema.rst or
> https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
> for instructions).
>
> Best regards,
> Krzysztof
>
I forgot to remove 'ma35d1-pinfunc.h' from my local copy.
After remove the '#include <dt-bindings/pinctrl/ma35d1-pinfunc.h>', it
can pass
the `make dtbs_check W=1` check.
I will fix it in the next version.
Best Regards,
Jacky Huang
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