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Message-ID: <ZWe+ljzCUQQVu7oD@andrea>
Date: Wed, 29 Nov 2023 23:43:34 +0100
From: Andrea Parri <parri.andrea@...il.com>
To: Mathieu Desnoyers <mathieu.desnoyers@...icios.com>
Cc: paulmck@...nel.org, palmer@...belt.com, paul.walmsley@...ive.com,
aou@...s.berkeley.edu, mmaas@...gle.com, hboehm@...gle.com,
striker@...ibm.com, charlie@...osinc.com, rehn@...osinc.com,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] membarrier: riscv: Provide core serializing command
> > So I should probably stick to 93917ad50972, which apparently selected
> > CONFIG_MEMBARRIER on RISC-V, for the Fixes: tag in question.
>
> I think it goes further than that, because you can explicitly
> CONFIG_MEMBARRIER=y, see init/Kconfig:
>
> config MEMBARRIER
> bool "Enable membarrier() system call" if EXPERT
> default y
> help
> Enable the membarrier() system call that allows issuing memory
> barriers across all running threads, which can be used to distribute
> the cost of user-space memory barriers asymmetrically by transforming
> pairs of memory barriers into pairs consisting of membarrier() and a
> compiler barrier.
>
> If unsure, say Y.
>
> Before 1464d00b27b2, riscv just happened to set it to =n in the defconfig.
>
> I suspect the initial port of riscv merged after v4.14 was already broken.
I see. Oh well, guess I'll have to leave this up to the maintainers then
(I believe I've never managed to build riscv that far), Palmer?
> > I'll look into adding the membarrier feature you mention (as a final/
> > follow-up patch), unless you or someone else want to take care of it.
>
> I'll be happy to review it :)
Sweet! :-)
Andrea
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