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Message-ID: <ZWcFpjLbAf1-YtLs@APC323>
Date: Wed, 29 Nov 2023 17:34:30 +0800
From: Yu-Chien Peter Lin <peterlin@...estech.com>
To: Conor Dooley <conor.dooley@...rochip.com>
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Subject: Re: [PATCH v4 11/13] riscv: dts: allwinner: Add T-Head PMU extension
Hi Conor,
On Thu, Nov 23, 2023 at 02:58:55PM +0000, Conor Dooley wrote:
> On Wed, Nov 22, 2023 at 08:12:33PM +0800, Yu Chien Peter Lin wrote:
> > xtheadpmu stands for T-Head Performance Monitor Unit extension.
> > Based on the added T-Head PMU ISA string, the SBI PMU driver
> > will make use of the non-standard irq source.
>
> Allwinner aren't the only ones using T-Head CPUs that the previous
> m*id pmu detection code would have matched on. I think the first three
> files below will also need to be updated:
>
> rg -l "thead,c[0-9]*\b[^-]" arch/riscv/boot/dts/
> arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi
> arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> arch/riscv/boot/dts/thead/th1520.dtsi
> arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
That's really helpful, I'll add these .dtsi files in the patchset v5.
Thanks,
Peter Lin
> Cheers,
> Conor.
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