linux-kernel - Re: [PATCH 14/16] drm/msm/dpu: do not allow YUV formats if no CDM block is present

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Date:   Thu, 30 Nov 2023 16:50:38 -0800
From:   Abhinav Kumar <quic_abhinavk@...cinc.com>
To:     Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
CC:     <freedreno@...ts.freedesktop.org>, Rob Clark <robdclark@...il.com>,
        "Sean Paul" <sean@...rly.run>,
        Marijn Suijten <marijn.suijten@...ainline.org>,
        "David Airlie" <airlied@...il.com>,
        Daniel Vetter <daniel@...ll.ch>,
        <dri-devel@...ts.freedesktop.org>, <quic_jesszhan@...cinc.com>,
        <quic_parellan@...cinc.com>, <quic_khsieh@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 14/16] drm/msm/dpu: do not allow YUV formats if no CDM
 block is present



On 8/30/2023 5:24 PM, Dmitry Baryshkov wrote:
> On Thu, 31 Aug 2023 at 01:50, Abhinav Kumar <quic_abhinavk@...cinc.com> wrote:
>>
>> On chipsets where CDM block is not available OR where support has
>> not been added yet do not allow YUV formats for writeback block.
>>
>> Signed-off-by: Abhinav Kumar <quic_abhinavk@...cinc.com>
>> ---
>>   drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
>> index 7fc174b33ae2..d8edca9bc964 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c
>> @@ -406,6 +406,12 @@ static int dpu_encoder_phys_wb_atomic_check(
>>                  return ret;
>>          }
>>
>> +       if (DPU_FORMAT_IS_YUV(to_dpu_format(msm_framebuffer_format(fb))) &&
>> +           !phys_enc->dpu_kms->catalog->cdm) {
>> +               DPU_ERROR("cannot support YUV formats without CDM block\n");
>> +               return -EINVAL;
>> +       }
> 
> Can we have YUV formats in wb_formats if we do not support CDM? That
> would be an error.

I can drop this one once i address the comments on the next patch.

Yeah the reason for this change was we had one formats array for wb and 
were using that for all chipsets. We can have two arrays : one only rgb 
and the other rgb+yuv to address this.

> 
>> +
>>          return 0;
>>   }
>>
>> --
>> 2.40.1
>>
> 
>