[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <7cdf280c-c3b4-4996-9854-d24c4842ff4d@app.fastmail.com>
Date: Fri, 01 Dec 2023 10:49:19 +0000
From: "Jiaxun Yang" <jiaxun.yang@...goat.com>
To: "Gregory CLEMENT" <gregory.clement@...tlin.com>,
"paulburton@...nel.org" <paulburton@...nel.org>,
"Thomas Bogendoerfer" <tsbogend@...ha.franken.de>,
"linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
"Rob Herring" <robh+dt@...nel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: "Vladimir Kondratiev" <vladimir.kondratiev@...ileye.com>,
"Tawfik Bayouk" <tawfik.bayouk@...ileye.com>,
"Alexandre Belloni" <alexandre.belloni@...tlin.com>,
Théo Lebrun <theo.lebrun@...tlin.com>,
"Thomas Petazzoni" <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH v2 20/21] MIPS: generic: Add support for Mobileye EyeQ5
在2023年12月1日十二月 上午10:34,Gregory CLEMENT写道:
> "Jiaxun Yang" <jiaxun.yang@...goat.com> writes:
>
>> 在2023年11月23日十一月 下午3:26,Gregory CLEMENT写道:
>>> Introduce support for the MIPS based Mobileye EyeQ5 SoCs.
>>>
>>> Signed-off-by: Gregory CLEMENT <gregory.clement@...tlin.com>
>>> ---
>> [...]
>>> diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
>>> index 7dc5b3821cc6e..04e1fc6f789b5 100644
>>> --- a/arch/mips/generic/Kconfig
>>> +++ b/arch/mips/generic/Kconfig
>>> @@ -48,6 +48,13 @@ config SOC_VCOREIII
>>> config MSCC_OCELOT
>>> bool
>>>
>>> +config SOC_EYEQ5
>>> + select ARM_AMBA
>>> + select WEAK_ORDERING
>>> + select WEAK_REORDERING_BEYOND_LLSC
>>> + select PHYSICAL_START_BOOL
>>> + bool
>>
>> ^ I believe WEAK_ORDERING is already selected by MIPS_CPS,
>
> But MIPS_CPS can be disabled: it is not selected by
> MIPS_GENERIC_KERNEL.
IMO if MIPS_CPS is not select then there is no SMP support on this platform.
WEAK_ORDERING only make sense for SMP system.
>
>> and WEAK_REORDERING_BEYOND_LLSC should be selected by MIPS_CPS as well.
>
> WEAK_REORDERING_BEYOND_LLSC is only selected by CPU_LOONGSON64 for
> now not by MIPS_CPS
I believe this applies to all SMP cores from MTI, I'll check with hardware
folks.
Thanks
- Jiaxun
>
> Thanks,
>
> Gregory
>>
>> Thanks
>> --
>> - Jiaxun
>
> --
> Gregory Clement, Bootlin
> Embedded Linux and Kernel engineering
> http://bootlin.com
--
- Jiaxun
Powered by blists - more mailing lists