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Message-ID: <20231201113456.GU32077@kernel.org>
Date: Fri, 1 Dec 2023 11:34:56 +0000
From: Simon Horman <horms@...nel.org>
To: Geetha sowjanya <gakula@...vell.com>
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
kuba@...nel.org, davem@...emloft.net, pabeni@...hat.com,
edumazet@...gle.com, sgoutham@...vell.com, lcherian@...vell.com,
jerinj@...vell.com, pbhagavatula@...vell.com, sbhatta@...vell.com,
hkelam@...vell.com
Subject: Re: [net-next PATCH] octeontx2-af: cn10k: Increase outstanding LMTST
transactions
On Wed, Nov 29, 2023 at 04:51:55PM +0530, Geetha sowjanya wrote:
> From: Pavan Nikhilesh <pbhagavatula@...vell.com>
>
> Currently the number of outstanding store transactions issued by AP as
> a part of LMTST operation is set to 1 i.e default value.
> This patch set to max supported value to increase the performance.
>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@...vell.com>
> Signed-off-by: Geetha sowjanya <gakula@...vell.com>
...
> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
> index 0e74c5a2231e..93fedabfe31e 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
> +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c
> @@ -559,3 +559,12 @@ void rvu_nix_block_cn10k_init(struct rvu *rvu, struct nix_hw *nix_hw)
> cfg |= BIT_ULL(1) | BIT_ULL(2);
> rvu_write64(rvu, blkaddr, NIX_AF_CFG, cfg);
> }
> +
> +void rvu_apr_block_cn10k_init(struct rvu *rvu)
> +{
> + u64 reg;
> +
> + reg = rvu_read64(rvu, BLKADDR_APR, APR_AF_LMT_CFG);
> + reg |= 0xFULL << 35;
Hi Pavan and Geetha,
I think it would be best to avoid the magic value 35 here.
Best would probably be to use GENMASK_ULL and FIELD_PREP.
Else defining something similar to APR_LMT_MAP_ENT_SCH_ENA_SHIFT.
It might also be nice to avoid the magic value 0xFULL using a #define.
> + rvu_write64(rvu, BLKADDR_APR, APR_AF_LMT_CFG, reg);
> +}
> --
> 2.25.1
>
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