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Message-Id: <20231204115710.2247097-12-arnd@kernel.org>
Date: Mon, 4 Dec 2023 12:57:01 +0100
From: Arnd Bergmann <arnd@...nel.org>
To: linux-mips@...r.kernel.org
Cc: Arnd Bergmann <arnd@...db.de>,
"Andrew Morton" <akpm@...ux-foundation.org>,
"Stephen Rothwell" <sfr@...hwell.id.au>,
"Linux Kernel Mailing List" <linux-kernel@...r.kernel.org>,
"Thomas Bogendoerfer" <tsbogend@...ha.franken.de>
Subject: [PATCH 11/20] mips: fix tlb_init() prototype
From: Arnd Bergmann <arnd@...db.de>
There are two definitions for tlb_init(), but no global declaration:
arch/mips/mm/tlb-r4k.c:552:6: error: no previous prototype for 'tlb_init' [-Werror=missing-prototypes]
arch/mips/mm/tlb-r3k.c:244:6: error: no previous prototype for 'tlb_init' [-Werror=missing-prototypes]
Move the declaration to asm/setup.h and included it as needed.
Signed-off-by: Arnd Bergmann <arnd@...db.de>
---
arch/mips/include/asm/setup.h | 1 +
arch/mips/kernel/traps.c | 2 --
arch/mips/mm/tlb-r3k.c | 1 +
arch/mips/mm/tlb-r4k.c | 1 +
4 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/setup.h b/arch/mips/include/asm/setup.h
index 8c56b862fd9c..4dce41138bad 100644
--- a/arch/mips/include/asm/setup.h
+++ b/arch/mips/include/asm/setup.h
@@ -27,5 +27,6 @@ extern unsigned long ebase;
extern unsigned int hwrena;
extern void per_cpu_trap_init(bool);
extern void cpu_cache_init(void);
+extern void tlb_init(void);
#endif /* __SETUP_H */
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 246c6a6b0261..c58c0c3c5b40 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -2157,8 +2157,6 @@ void *set_vi_handler(int n, vi_handler_t addr)
return set_vi_srs_handler(n, addr, 0);
}
-extern void tlb_init(void);
-
/*
* Timer interrupt
*/
diff --git a/arch/mips/mm/tlb-r3k.c b/arch/mips/mm/tlb-r3k.c
index 1fb2cf8c8bfa..f6db65410c65 100644
--- a/arch/mips/mm/tlb-r3k.c
+++ b/arch/mips/mm/tlb-r3k.c
@@ -23,6 +23,7 @@
#include <asm/io.h>
#include <asm/bootinfo.h>
#include <asm/cpu.h>
+#include <asm/setup.h>
#include <asm/tlbex.h>
#undef DEBUG_TLB
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index a542b255019a..44411b20c7ec 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -24,6 +24,7 @@
#include <asm/tlb.h>
#include <asm/tlbex.h>
#include <asm/tlbmisc.h>
+#include <asm/setup.h>
/*
* LOONGSON-2 has a 4 entry itlb which is a subset of jtlb, LOONGSON-3 has
--
2.39.2
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