linux-kernel - Re: [PATCH 2/2] drm/panel-simple: add Evervision VGG644804 panel entry

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Message-ID: <600382c8-9560-4228-b621-b41e28b2ace4@linaro.org>
Date:   Tue, 5 Dec 2023 09:14:20 +0100
From:   Neil Armstrong <neil.armstrong@...aro.org>
To:     Michael Walle <mwalle@...nel.org>,
        Jessica Zhang <quic_jesszhan@...cinc.com>,
        Sam Ravnborg <sam@...nborg.org>,
        David Airlie <airlied@...il.com>,
        Daniel Vetter <daniel@...ll.ch>,
        Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
        Maxime Ripard <mripard@...nel.org>,
        Thomas Zimmermann <tzimmermann@...e.de>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Thierry Reding <thierry.reding@...il.com>
Cc:     dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] drm/panel-simple: add Evervision VGG644804 panel
 entry

On 23/11/2023 11:24, Michael Walle wrote:
> Timings taken from the datasheet, although sometimes there are just
> typical values and it's not clear if they are no min and max values or
> if you must use the typical value exactly. To make things worse, there
> is no back porch but only a combined sync and back porch length.
> 
> Unfortunately, there is not public datasheet. Therefore, here are the
> relevant timings:
>                   | min |  typ   | max |
> -----------------+-----+--------+-----+
> CLK frequency    |  -  | 25.175 |  -  |
> HS period        |  -  |   800  |  -  |
> HS pulse width   |  5  |    30  |  -  |
> HS-DEN time      | 112 |   144  | 175 |
> DEN pulse width  |  -  |   640  |  -  |
> VS pulse width   |  1  |     3  |  5  |
> VS-DEN time      |  -  |    35  |  -  |
> VS period        |  -  |   525  |  -  |
> 
> Signed-off-by: Michael Walle <mwalle@...nel.org>
> ---
>   drivers/gpu/drm/panel/panel-simple.c | 30 ++++++++++++++++++++++++++++
>   1 file changed, 30 insertions(+)
> 
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index 9367a4572dcf..26702a847b63 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -1973,6 +1973,33 @@ static const struct panel_desc eink_vb3300_kca = {
>   	.connector_type = DRM_MODE_CONNECTOR_DPI,
>   };
>   
> +static const struct display_timing evervision_vgg644804_timing = {
> +	.pixelclock = { 25175000, 25175000, 25175000 },
> +	.hactive = { 640, 640, 640 },
> +	.hfront_porch = { 16, 16, 16 },
> +	.hback_porch = { 82, 114, 170 },
> +	.hsync_len = { 5, 30, 30 },
> +	.vactive = { 480, 480, 480 },
> +	.vfront_porch = { 10, 10, 10 },
> +	.vback_porch = { 30, 32, 34 },
> +	.vsync_len = { 1, 3, 5 },
> +	.flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
> +		 DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE |
> +		 DISPLAY_FLAGS_SYNC_POSEDGE,
> +};
> +
> +static const struct panel_desc evervision_vgg644804 = {
> +	.timings = &evervision_vgg644804_timing,
> +	.num_timings = 1,
> +	.bpc = 8,
> +	.size = {
> +		.width = 115,
> +		.height = 86,
> +	},
> +	.bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
> +	.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE,
> +};
> +
>   static const struct display_timing evervision_vgg804821_timing = {
>   	.pixelclock = { 27600000, 33300000, 50000000 },
>   	.hactive = { 800, 800, 800 },
> @@ -4334,6 +4361,9 @@ static const struct of_device_id platform_of_match[] = {
>   	}, {
>   		.compatible = "eink,vb3300-kca",
>   		.data = &eink_vb3300_kca,
> +	}, {
> +		.compatible = "evervision,vgg644804",
> +		.data = &evervision_vgg644804,
>   	}, {
>   		.compatible = "evervision,vgg804821",
>   		.data = &evervision_vgg804821,

Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>